The Game of Leapfrogging Needs At Least 2 Frogs

Do you recall the numerous times when disillusioned AMD die-hards repetitively say “well if it wasn’t for AMD, there won’t be any competition… ”. With the release of Penryn, Intel's 45nm QX9650 ahead of Phenom whilst adding another level of gap in performance, I really think it's time for the "fanatics" to stop talking such nonsense.

The moment we see Intel sand bagging its “Extreme Edition” to levels just enough to keep a noticeable distance from competition that is the point when we can say that real competition is dead. AMD has stopped pushing Intel to release what’s at the edge of what it can offer and it appears that things won't change much on this front. As AMD tries to squeeze water from a rock with it's soon to be released Spider platform, Intel on the other hand launches a product that beats everything in the market without even trying. The sheer amount of interest in overclocking Yorkfield only points to the untapped capability of Intel's newest 45nm CPUs, ready and waiting when real competition do come around.

Benchmark results on Intel's next generation CPU family is all over the Internet and it continues to look bad for AMD:

These are just sample benchmark results randomly taken from the TechReport.

I think the key message that Intel wants to come across with the Penryn launch is the noticeable improvement in power efficiency. Performance is only secondary since it is obvious by now that Intel has a tight grip on this crown. Launching the new processors at the existing speed grade of 3.0Ghz is only meant to ensure that everyone takes notice of what 45nm brings to the table. The power efficiency improvements are quite impressive and any performance gains achieved while transitioning to an industry leading process node is just icing on the cake.

As if things couldn't get any worse for AMD, There is another Phenom benchmark review using Crysis that shows exactly what it means for AMD. It's indeed a crisis when you're soon to be released processor is already beaten before it even gets out the door. In the last earnings call when AMD said that Phenom will allow them to enter markets where they couldn’t normally participate, by looking at these latest benchmark they would be lying if they meant the performance market.


Roborat, Ph.D said...

Crysis link was from Peter. Thank you.

Anonymous said...

Here is what Scientia predicted about Intel vs AMD back in 2006 when the Core architecture was revealed (written on AMDZONE under the topic Anandtech has detailed K8 vs Core architecture comparison...):

Q. Can K8 compete with Core?

A. Not for very long. As Intel continues to develop Core in 2007 it would surpass anything that AMD could do with K8. AMD would once again be K7 to P4.

Q. So then this is really good for Intel, right?

A. Not exactly. If Intel had been able to deliver Core at the beginning of 2006 they would be in a much better position. Instead, their revenues will be down in the first two quarters and then they will have to scramble to try to hit their estimate of a 3% loss for the year.

Q. But even with a loss won't Intel stay in the lead for a long time like they did with P4? After all, K7 was briefly in the lead but couldn't hold it against P4.

A. No. Intel has very little hope of staying in the lead in 2007. If Intel only had to contend with K8 on 90nm they would be in very good shape. If they had to compete with K8 on 65nm they could still hold the lead on the desktop. However, Core faces the much newer K8L in early 2007. Core has almost no chance of holding the lead against a new architecture on the same process. Intel's first hope of regaining the lead will be the release of Nehalem on 45nm in late 2008.

Q. Wait, so you mean that Conroe will be like K7 and only get ahead for a short time?

A. Yes, most likely no more than two quarters.

Q. But Intel is so much bigger than AMD. They can cut prices or something. Surely Intel can take market share back from AMD.

A. No. Things are different now than they used to be. With the trial still underway Intel would be foolish to try the same monopoly tactics. Also, Intel's price advantage over AMD is completely gone. If Intel does cut prices their revenue will shrink. None of the old Intel strategies will work against a competitor with a more advanced FAB process, flexible manufacturing, and 300mm wafer size. This isn't like the old days when Intel was more advanced on process technology and AMD had no high end or server processors.


Tom said...

Yorkies *easily* see 4 GHZ with green zone overclocking...


I never paid attention to the sharikook bankruptcy talk (on both sides), but if Intel continues to execute flawlessly with Nehalem, I believe Intel will have the luxury of two very attractive choices:

1. A $40 stock price with AMD 18 months behind on process technology but eeking out a profit.

2. A $25 stock price and AMD wiped off the map.

Anonymous said...

hahahaha lmfao@scientia

InTheKnow said...

Roborat, don't you know that the Crysis benchmark was compiled to favor Intel and cripple AMD? What are you thinking, man? ;P

Peter said...

LOL anonymous poster, thanks for posting Scientia's oh so accurate 'predictions'! :D

Anonymous said...

Put in Sharikou's own word.... Phenom is already "pre-fragged"

Anonymous said...

What's scary is Penryn is not a new architecture, it's a basic shrink (with some optimizations thrown in). I think the power is nothing short of amazing. The fact that clock for clock is >0% is gravy....

I love the AMD fans that are saying "only 5-10% performance"; just curious can someone remind me what performance gain was observed (clock for clock) when AMD shrunk K8 from90nm to 65nm?

Also how much were they able to ratchet up the clock speed due to the (theoretically) better process?

Kind of funny how 5-10% (putting SSE4 aside for now) for a shrink for Intel is pretty expected/weak, yet a big fat 0% for AMD is expected and no big deal (it's only a shrink right?).

Also AMD fans should take note of how Intel actually can clock parts on the new, better tech node to HIGHER clockspeeds, as opposed to the new negative scaling AMD has chosen to implement on 65nm.

When you look at power (idle and peak), higher clockspeeds and overclockability - 45nm doesn't appear to be as poor as Scientia attempted to suggest through his ridiculous analysis that Intel was throwing away inferior 45nm parts (due to his lack of financial knowlegde)

Now if I look at AMD's 65nm process ; clockspeed below the top bins on 90nm, no major change in overclockability, AMD's new introduction of 'native' cripple-core technology - I begin to wonder how exactly is AMD closing the technology gap again?

SPARKS said...

“1. A $40 stock price with AMD 18 months behind on process technology but eeking out a profit.”

“2. A $25 stock price and AMD wiped off the map.”

Tom, I think you hit the nail on the head. One can only imagine board meetings at INTC. I’d love to know their long term strategy factoring in the 2009 litigation, of course.

It’s kind of like a kid who’s finally trapped a fly after many failed attempts. He pulls a wing off to see it spin in circles. It goes no where and makes a lot of noise in the process. He pulls the other wing off to see the once nimble fly merely crawl across the floor. Perhaps, he’ll fake a swat, just to see it jump. He’ll do this for a couple of quarters, err—a couple of times. Then he pulls the legs off one at a time. Finally, he either pulls its head off, or leaves it there to die grasping the air with its sucker.

Seriously, though, INTC does face litigation, no doubt. Mr. McCoy, who has made a small fortune on behalf of AMD, cannot collect blood from the proverbial stone. Further, based on INTC’s past 18 month performance and projected future performance, by the time this reaches the courtroom in 2009, INTC will show the court then didn’t need to use ‘monopolist tactics’ to gain and keep market share. They did it with the fair fight AMD was scrapping for. AMD got it in spades! Besides, it will be easier to fight a fly with no legs and wings, later on, in 2009. The case is coming up anyway. It’s like the “Kobiashi Maru”, Star Treks no win scenario. What’s going to happen will happen, so INTC may as well crush them in the interim, or let them slowly die from starvation.

Also, as we are all very well aware, AMD’s ATI buyout was a serious and expensive mistake. Should INTC be responsible for AMD’s errors in judgment, management, and product execution on a level playing field? It’s not common that a viable company puts themselves in the hole for 5.4 billion in 12 month’s time! Further, these assumptions are based on AMD’s current market position. Only, Intel’s top management will decide where and when, between your two choices, they will pull off another AMD appendage.

Only Capt. Otellini knows for sure. After all, Revenge is a dish best served cold.


Anonymous said...

"Also, as we are all very well aware, AMD’s ATI buyout was a serious and expensive mistake."

Sure the ATI acquisition may have hastened AMD's losses, but these were coming with or without the ATI acquisition - they may have come slower and been smaller in magnitude, but it was an eventuality now that we see what AMD had behind K8.

K10 doesn't look like it will deliver what it was hyped up as. Sure in time it may be competitive, but this was supposed to cement AMD's lead in servers and highend desktop until Nehalem came around - now it looks like AMD will need to continue with the scorched earth policy of dropping prices until the chips finally sell. I'll reiterate, AMD is far better off ceding some market share, raising prices and using excess capacity for chipsets rather than trying to fully utilize the fab by slashing prices to the point of losses. Intel is capacity consrained right now so slashing prices only means Intel sells fewer low margin chips and their mix is more high ASP-rich.

OK, I'm AMD - Let's see Intel for the near future can only supply 80% of the market, so I pretty much will sell the remaining 20%. I could hold prices and get better profitability or I can insanely think I should just slash prices in a desperate attempt to get to 23-24% market share! Let's devalue my entire market line to pick up 3-4 market share points! Is there ANYONE at AMD with a business degree?

Back to ATI - AMD had no choice but to go for the homerun with ATI; the writing was on the wall with Intel graphics agressiveness (Larabee has been the worst kept secret) and AMD was NEVER going to gain significant ground in the commercial world without a platform solution. There was no way to develop this in house in a timely manner and keep up with Intel, so the only way to compete was to acquire the expertise.

It comes down would you rather take a shot, hope K10, 65nm and 45nm all deliver (none of which seems to be the case) or slowly bleed and be forever relgated to the ever shrinking retail space (and the niche 4P+ space)?

I admire AMD for taking a shot - it is easy to say in hindsight it was the wrong decision, but had AMD's execution been better on 65nm and K10 (and Intel's execution not so clean on Core2, 45nm, and Penryn), they wouldn't be in the bad shape they would be in today.

Had AMD not acquired ATI, would they really be that much better off today? Sure they would have had more cash and could have built more capacity out - but is AMD really capacity limited at this point (or demand / product / development limited)?

Anonymous said...

"Seriously, though, INTC does face litigation, no doubt."

Honestly this is somewhat irrelevant at this point. AMD is bleeding all over and holding out to get some extra money to buy bandages after you've lost 50% of your blood is not going to make a difference.

AMD will not see a penny (unless settled out of court) until at least 2011 or LATER... the trial theoretically starts in H1'09 - it will likely be delayed with a bunch of pre-trial motions as usual - meaning best case H2'09. Figure verdict H1'10 - if by some chance AMD wins, throw in 1-2 years of appeals by Intel (2011-2012 BEST CASE).

The problem is that even if AMD does win it will impact their balance sheet, but that doesn't make them instantly competitive. What if they get say $4Bil? Sounds like a lot of money? That's one fab, and a fab that will take 2-3 years to build out and ramp (using timeline above that means 2013-2014) It's not like money will instantaneously allow AMD to make a product breakthrough or develop a 32nm process magically.

The major problem is that despite AMD's current position the root cause of their problems is not cash and debt or the current access they have to the market, it is they have fallen behind on both product and technology (with K8 they were only behind on technology and were able to compensate for that with a better product design) 2Billion doesn't instantaneously give them a better yielding 65nm process or an additional fab or a high K solution, these things take YEARS of investments (Intel started research on high K back in 2001 on 200mm wafers).

AMD's best bet is to settle out of court - use the cash to pay off additional debt, invest in Si process research and devleopment and focus on execution instead of whining about monopolies. Either that or plan to ride things out until 2011 before they see a single penny should they win. AMD has gotten all the PR they are going to get out of the lawsuit, clearly have gotten the account wins at OEM's so other than cash (and maybe Hector's ego?) why continue the lawsuit? Would you rather have 0.5-1 Billion today, or a 50/50 chance at $5Bil 4-5 years from now? Keep in mind the trial only covers products sold to the US market (which is now what ~30% of the total market). The US has no jurisdiction over parts manufactured in Germany (as all AMD parts are) and say sold in Australia.

If I were Intel I would gladly pay 500mil to wash my hands of this thing (heck the legal bills alone will be a significant amount of that by the time this thing is done). If you plug in the NPV of a settlement, the probablility of winning and amount you would get, the ROI is fairly straightforward and easy to understand for anyone with a finance, business and strategic planning background. What is AMD thinking? We just need to hold out until 2012 and then we'll get 60Billion in damages? Then all of our current problems go away? If AMD had 10Bil in cash TODAY, would the competitive situation for the next 2-3 years be any different?

Giant said...

If I were Intel I would gladly pay 500mil to wash my hands of this thing (heck the legal bills alone will be a significant amount of that by the time this thing is done).

I doubt that Intel will hand over one cent to AMD willingly.

Peter said...

AMD just can't get a break these days...


Their upcoming GPUs won't perform up to par with the newly released 8800GT, so they will undercut it with pricing.

Sound familiar? ;)

Axel said...

Copied for posterity, my analysis below logically deduces that the Crysis benchmarks are actually very bad news for Phenom:


Seems that with a full working processor (non engineering sample) and the apropriate platform, Phenom is equal/better clock per clock than penryn (on games).

Ho Ho

From 3-3-3-9 1T to 5-5-5-15 2T you loose 6% performance. Performance difference in Crysis between QX9650 and OC'd X4 was ~7.5%.

No, I'm sorry but you gents are't thinking this through. The Crysis scores revealed in the command prompts for four timedemos were:

- minimum fps
- average fps
- peak fps

Now, if you look at the scores, Yorkfield 3.0 beats Phenom X4 3.0 by:

- 250% in minimum fps
- 7.5% in average fps
- 4.6% in peak fps

A couple conclusions can be drawn from these numbers:

1. The fact that the Yorkfield and Kentsfield scores are about identical for all three categories indicates that the game is not memory bottlenecked at all. If it were, Yorkfield's 50% larger L2 would help significantly.

2. The fact that all four CPUs score within 5% of each other for peak fps indicates that the peak framerate is largely bottlenecked by the GPU, not the CPU.

3. Since the difference in average framerate (7.5%) is much closer to the difference in peak (4.6%) than to the difference in minimum (250%), this indicates that the demo is GPU bottlenecked for most of its duration.

3. The huge 250%difference in minimum fps indicates that the game does occassionally see a CPU bottleneck on Phenom, but not too often.

We can logically conclude that the Crysis timedemo as run in that test was GPU bottlenecked over the great majority of the duration, but for those few moments where the CPU is the bottleneck, Phenom X4 is completely destroyed by the Intel processors. It is because those moments are few and far between in the demo that the average fps scores are fairly close between the four CPUs.

I believe that K8 3.0 GHz would score nearly the same as Phenom in this demo. It would certainly score about the same peak fps, as that score is clearly GPU bottlenecked. The minimum fps would be perhaps about 15% lower than Phenom, but as I described, those CPU bottlenecked moments are rare. The average fps would hence likely only be some 3-5% lower for K8 than Phenom, say around 44.5 fps.

Giant said...

Lots of you will find this very interesting.


It turns out that the QX9650, while rated with a 130W TDP, consumes only ~65W!

The new QX9650 quad-core based on the latest 45nm HKMG (High K Metal Gate) manufacturing process consumes less power on average than an Intel E6750 2.66GHz dual-core. At idle the QX9650 system draws 160W versus an E6750 at 175W idle. At peak consumption the QX9650 draws 215W versus the E6750 at 214W which is nearly identical. That’s shocking when you consider the fact that we’re comparing four 3 GHz cores versus two 2.66 GHz cores.

What's more, when overclocked to 4Ghz it still fits within a 130W TDP limit. This new process technology is just incredible!

I do hate to sound like a broken record (like some of those AMD fanboys), but future steppings on the 45nm platform should further reduce voltage needs and power consumption e.g. from B3 stepping -> G0 stepping.

Giant said...


SUPERPI 1M scores: http://www.expreview.com/img/news/071030/k10_3g_superpi.png

Here is Q6600, overclocked to 3Ghz with 1333 FSB (so same settings as a QX6850 by default): http://img.photobucket.com/albums/v30/johnli0615/SuperPiOC30.jpg

I too have a Q6600 @ 3Ghz. I get 17.4s as my time.

This isn't even counting Yorkfield, which will report even better scores!

Giant said...



In other news, AMD renamed the SPIDER platform to SNAIL platform. This reflects the snail pace that the PHENOM CPU and RV670 graphics cards run at!

Anonymous said...

Lest we forget that in a Capitalist economy such a huge corporation that actually has a product that can benefit the market rarely ever disappears. It is more likely that someone like IBM or Sun, who already dabble in processors, would just pick up AMD/ATI at its lowest and turn it into something good.

I know all the Intel fanboys are loving the fact that Intel clearly has a lead and AMD is doing nothing to disspel that notion, but without any competition Intel will just hike prices and slow down development.
They have an aggressive roadmap now because they were afraid they might need it, but it is becoming clear that AMD probably can't compete at the high end.
It is quite plain to see that Intel is holding back considering the new 45nm processors can clearly clock up to 4Ghz on air and much much higher with a little effort yet Intel refuses to release any processors officially clocked over 3.16 Ghz.

Anonymous said...

"Lest we forget that in a Capitalist economy such a huge corporation that actually has a product that can benefit the market rarely ever disappears"

Lest we forget (as most armchair analysts do) - the CPU biz is ABOUT MANUFACTURING! AMD could have the best product in the world but without the ability to manufacture it in volume (and cheaply) they will always be relegated to a bit player. The companies you mention - IBM, SUN do not have the manufacturing expertise - look at IBM's yield problems with cell - you think they would do any better with K10?

AMD would need to be bought by someone like Samsung who actually has the ability to make products in volume.

Andy said...

It is quite plain to see that Intel is holding back considering the new 45nm processors can clearly clock up to 4Ghz on air and much much higher with a little effort yet Intel refuses to release any processors officially clocked over 3.16 Ghz.

Yeah but remember power consumption. If they clocked higher AMD would pull that old chesnut.

SPARKS said...

Some of the comparative benchmarks of QX9650 have been quite remarkable. Clock for clock it is marginally faster than an equally clocked (as reported 3GHz) Pheromone in most every aspect. However, on second thought, I’ve got a teensy weensy issue with the launch.

You see, I can remember a time when you were overclocking; you would scrape for 40 or 50 MHz. Not this monster! A full 1 Gig, on air, at launch! Then add some juice, a little water, and 4.3, no biggie?!?! WTF!

Look, downplaying and holding back some competitive reserve is one thing, but they are deliberately pulling in the reigns on this bad boy. This ain’t “breathing room” this is sandbagging.

As an enthusiast, I don’t care I’ll buy the unlocked variety, clock the piss out it until I fry some memory and be done with it.

As a share holder, we’re back to the good old days where a little speed bump, here and there, and we’re back on top. The share price rises, market share increases, the dividend checks get fatter, and so do I.

As a consumer advocate, and here’s the point, this thing should have been launched at 3.3 GHz as will the 1600 MHz FSB QX9770, 1Q ’08. (My choice, by the way) God knows they’ve got the headroom. So why didn’t they do it?

They didn’t need to, nor did they have to. This launch is a TRUE indication of Intel’s strength and confidence in the market, presently. Make no mistake, they are in the comfort zone again, and this time, there’s no going back. Lesson learned.

AMD, you ask? Its brief market superiority will, in the final analysis, be a footnote in history. It’s over. Tom’s first choice (above) seems, by this launch, to be the way INTC is going to go.


Anonymous said...

The power rating on the extreme part really doesn't matter - folks buying this could probably care less whether its 65W, 95W or 130W, so long as you can overclock it. On the Intel side this gives them a much larger bin in all likelihood.

Now they shouldn't be sandbagging the TDP #'s on the mainstream parts. You can also see that they don't on server (where people tend to care about power consumption).

It is rather ironic - Intel is now vastly understating power consumption while AMD has moved to average power consumption to make the #'s look better. My how times have changed....

My guess is you will no longer hear performance per watt from AMD. They will either start a performance per price campaign (if they can slash their prices low enough to compensate for performance) or what I think will most likely be the new AMD marketing spin - "good enough" (they'll probably use better language) - Sure our competitor crushes us on performance and power but do you really need it? You can already see this strategy starting to take hold with cripple core - 'most SW today on desktop can't take advantage of 4 cores anyway'

Funny when they released AMD64 and most SW couldn't take advantage of that, the mantra was "future proof", is quad core not in the same category? Funny how the worm turns, eh?

SPARKS said...

“folks buying this could probably care less whether its 65W, 95W or 130W”

F**k’en A Bubba!

I’m presently installing a 3 Phase 2000A (per leg) @ 480V chiller in a major hotel. I’ve got a 1 KW PS that’s SSI rated, that can handle anything they can throw at it.

Ask me if I care about my CPU is using the equivalent of 2-75W light bulbs or 7 times less power than my wife’s vacuums cleaner, or microwave oven. GMAFB!

I’ve installed Liebert UPS systems in server rooms with racks upon racks of Blades. THOSE guy’s care about power consumption, trust me.

But, if some IDIOT talks about power per watt on a home PC, a serious reality check is definitely in order.


Tonus said...

Look, downplaying and holding back some competitive reserve is one thing, but they are deliberately pulling in the reigns on this bad boy. This ain’t “breathing room” this is sandbagging.

I think it's understandable, Intel seems to be run by people who don't repeat their mistakes. And I think they got caught with their pants down with the Pentium 1.1GHz mess, and their miscalculation with Netburst allowed AMD to grab the performance crown for a few years.

So I expect that they'll play it cautiously even if they feel confident that they have AMD over a barrel. They'll try to keep enough of a lead that they can keep pricing pressure on AMD while still getting good ASPs on their own parts, while making sure they've got a reserve in case AMD progresses faster than anticipated in both performance and supply.

Anonymous said...

"Look, downplaying and holding back some competitive reserve is one thing, but they are deliberately pulling in the reigns on this bad boy. This ain’t “breathing room” this is sandbagging."

Intel is, and will be capacity constrained fore the next quarter or two. Whether they release the part at 3.16 or 3.33 they will still only be able to produce so many chips and the demand will be high whether it is 3.16 or 3.33GHz. The bin splits at the lower speed and higher power should be better and give Intel a chance at (marginally) higher volumes on 45nm products early on.

Again most folks don't consider the business aspect of things. It's not always releasing the highest performance prodcut asap. Sometimes you try to push the market, other times you let the market pull.

Tom said...

Chartered seeing weakening demand from AMD in Q4. Comment?


Orthogonal said...

Again most folks don't consider the business aspect of things. It's not always releasing the highest performance prodcut asap. Sometimes you try to push the market, other times you let the market pull.

Excellent analysis of the situation, this is exactly the business model being employed at this time (market pull). It was an intentional move to help profitability and to more quickly adapt to changing market environments. It also has the negative aspect of coming up short on supply on unexpectedly high demand.

If everyone hasn't seen this presentation, it is an excellent summary by Andy Bryant of Intel's operations in an analyst meeting.


If you look at the fab loading vs. fab capacity chart, you'll notice that there are occasional dips in loadings due to seasonal changes in demand (after back-to-school, Christmas etc...) However, in Q1/Q2 of '07 you'll notice a slightly larger dip than normal. This was intentional to help bleed off excess inventory as part of the business and efficiency reorganization. Once the inventory dropped to acceptable levels, a market pull model was set in place and loadings have returned to normal. It is my understanding that Intel will employ this model for the forseeable future.

Anonymous said...

"Chartered seeing weakening demand from AMD in Q4. Comment?"

Chartered supply was relative peanuts in the grand scheme of things (I think ~3000WSPM when at its peak). It also was 90nm, I'm not sure if they have even switched to 65nm for AMD yet (anyone know?)

My guess is Chartered was doing the low end parts (well almost all of AMD parts are low end - I mean the low end of the low end). AMD probably has an excess there, especially as Intel continues to push down products into the mid and low range.

What should be a little concerting is that it was not too long ago where AMD was capcity constrained - obviously this is no longer the case if they are cutting production at Chartered. If demand was strong you'd think they would be using all available capacity.

Also F36 continues to ramp up - the AMD hopefuls assumed this would mean more market share; however this is likely just going to replace the Chartered outsourcing and make up for the much bigger K10 die.

On the positive side this should help AMD's margins as they don't have to pay Chartered to make chips - that tends to eat into the margins and is one of the many issues with the asset light/foundry model. Of course it is still not clear what AMD's "asset light" strategy" entails other than being light on cash. But I'm sure that will 'be defined sometime in the future so as not to tip our hand to our competitor' (read - we still have no clue and I need to stall for time to figure out something to make up about this). I'm very surprised the investment community let AMD get away with this crap - I don't recall a single question during the Q3 earnings call on how AMD was doing on the whole asset light topic.

SPARKS said...

Hey Fella’s, chill! I said a teensy weensy issue, as a consumer advocate. I am an investor first and foremost! I know we’re all on the same page here, and I’m not complaining as the share price has gone up five consecutive days, ending with today’s 63 cent per share gain. The market dynamics are understood (and well received). But here’s the thing, and there is no way of getting around this, this 45nM monster is got some serious frigg’en headroom. And, the only way your gonna see this badboy run to its full potential is buy a XE, agreed? Oooh, what a tease.

And Orthogonal, since you chimed in on the marketing dynamics thing, I’ll bet dollars to donuts you really know what goodies are coming up. eh? Um --- how’s that chip—with the um—IMC—um --- you know that –ah— Nehalem thing doing? I think that’s the name of it, right? :) Just kidding.

Rest assured, buddy, when my INTC dividend comes in 1Q ’08, I’ll be paying a good portion of your weeks salary on a QX9770, and X48. I don’t care what the damned things cost! I WANT THAT 1600MHz NATIVE FSB!



Anonymous said...

I love the AMD optimists on the Scientia blog - if you look at K10 vs Penryn clock for clock, Penryn is only slightly better....

Sounds reasonable, no? Except:
1) K10 was supposed to blow away Core2, now apparently expectations are so low that being in the ballpark is good enough.
2) The process available today and projected roadmaps show that it doesn't appear likely that AMD will be able to clock the K10 at Penryn's level in the near future! Who cares if an overclocked 3.0GHz parts is close to a STOCK, non-overclocked Intel part? You won't be able to get a part at Penryn's clock until midyear - and at that time the Penryn clock will likely be higher!

I hate this clock for clock crap! It's a nice academic exercise to compare computer architectures but in terms of performance it's about wha'ts available today of one part vs another.

If I underclock an AMD or Intel part and compare it to a Transmeta chip or a Via chip and they performed similarly would you say that Via or Transmeta is in the game?

This is just another typical bait and switch game that folks play - hey overclocked this looks ALMOST as good as another part. Of course we won't overclock the other one to it's max as well. We'll just assume AMD can get clockspeeds to where the current parts overclock to, but you obviously have to assume that Intel won't be able to do the same - therefor they are competitive!

If only Intel wasn't abusing its monopoly power by releasing parts at higher clocks! If this was a fair market Intel should be forced to release chips only at speeds similar to AMD so we can continue with this outstanding clock for clock analysis.

InTheKnow said...

If Tom's hardware keeps putting out rubbish like this tidbit from their Penryn review...

Compared to the 65 nm generation, which is based on strained-silicon technology, the new CPU runs 12°C cooler with all cores under full load.

I may have to quit reading their reviews.

While they don't actually say that Penryn doesn't use strained Si, the implication is clear. Strained Si and high-k metal gate are not competing strategies to the best of my knowledge. I don't see Intel taking 2 steps forward and 1 step back on Penryn.

Anonymous said...

"Strained Si and high-k metal gate are not competing strategies to the best of my knowledge. I don't see Intel taking 2 steps forward and 1 step back on Penryn."

They're not. They might not be perfectly additive but use of high K doesn't eliminate the benefits of strained Si (and Intel uses both on 45nm). This is now the 3rd generation of strained Silicon (in the form of selective SiGe) - AMD just implemented this on 65nm.

I would also speculate that strained Si, or possibly SOI (or some interaction between the two) are the cause of the AMD clockspeed problems as opposed to AMD's claims they are design related on K10 (truth be told it could be a design marginality interacting with a marginal selective SiGe process, but the SiGe process should be designed to be more robust)

Keep in mind the K8 shrink also has never been scaled to the 90nm clockspeeds - so does that have a design issue (too? This is just AMD having a good theoretical process (courtesy of IBM) but running it on the edge of a cliff to get that performance will show itself in manufacturing. (But they have the magical APM to fix all that!?!?) Yet another example of why you simply cannot compare the start of a technology node to judge how far ahead/behind a company is on Si technology. AMD is YEARS behind - SiGe, highK/metal gate, silicide, anneal to name a few.

SPARKS said...

Well, here it is folks. The Pheromone C2D killer, the one that was going to destroy Clovertown by 40%, will be launched @ 2.3GHz. B.F.D. !!!

Further, In The Know, Doc, GURU, and so many others on this site, your analysis and predictions have been 100% correct. All commentary ranging back for one year has been formally substantiated and postulated with clairvoyant precision.

You guys have harping on the voltage and leakage thing for at least six months. Now I know why, .975V at launch. If this doesn’t point to voltage issues, then I have to go back to my Atari 800!




InTheKnow said...

Keep in mind the K8 shrink also has never been scaled to the 90nm clockspeeds - so does that have a design issue too?

Man, you just don't get it do you? The market doesn't want high performing parts. If they did AMD would deliver. :P

Seriously, I wonder if this is just fallout from CTI. It's pure speculation on my part, but I think that AMD is trying to work out the transistor development on Brisbane and will then try to move it to the K10 family of products. The highest speed bins for 65nm are higher now than the clockspeeds on 90nm when 65nm "launched." It's more a case of 65nm not catching 90nm yet.

Not that any of that invalidates the idea that there is a process issue slowing down 65nm development. I'm just pointing out that progress is being made on 65nm. It's just slow like it always seems to be for AMD.

InTheKnow said...

And this from another blog...

The testing we've seen with Barcelona so far has been very poor. Although there was a great deal of whining that AMD sent out samples too late there was nothing to stop these same review sites from doing a proper job of testing in October but none bothered. It is clear that they are now waiting until Penryn and Phenom are available.

Might I throw out another possibility? How about AMD's NDA. If I recall correctly, it gives AMD veto power over all reviews before they can be published. Is it possible that these reviews don't shed a favorable light on Barcelona, so AMD isn't allowing their publication? Once again, we have speculation stated as incontrovertible fact.

Of course it could be that all these sites are just covering for Intel and don't want us to know how good Barcelona is. Yeah, that's it. It's all a conspiracy. It's just The Man keeping AMD down.

Anonymous said...

"It's more a case of 65nm not catching 90nm yet"

Only one problem with this theory - AMD claimed their 65nm process was 40%-45% faster than their 90nm process and made a huge deal of how healthy and good this was at the Dec'06 analyst meeting. If this were true, and there were no major yield issues (remember 65nm yields are "as expected" and "mature"), and no major leakage issues (SOI is the cure-all for all leakage problems right?!?!)...how could 65nm STILL be slower than current 90nm?

"You guys have harping on the voltage and leakage thing for at least six months. Now I know why, .975V at launch. If this doesn’t point to voltage issues..."

I think you mean leakage (not voltage) issues. What happens is as they increase the core voltage (which would in theory allow higher clocks), the leakage probably explodes. Thus to get a 'leaky' part inside the TDP window (especially with quad core), AMD needs to ratchet down the core voltage which typically means lower clockspeeds.

What is also interesting was there was another Phenom part operating at 1.19V at the same clockspeed (in VR-zone, link is in a recent Fudzilla article). If you look carefully it is the same family and same stepping - nice tight distribution on the voltages of those engineering samples - the process must be really fine tuned! (Sarcasm intended)

There is really no reason that you should have that much variation on Vcore (0.97 vs 1.19) to get the same top bin clockspeed unless that bin (and your process/design) is sitting on a cliff. That's a >20% Vcore delta to get the same clock!

Big Die + new architecture + crappy process = delayed launch and low clockspeeds. Could AMD possibly change more variables and just hope everything magically comes together? How about launching dual cores first to validate the architecture? How about stabilizing the 65nm process first instead of this "elegant" continuous change approach?

At this point if 45nm is as far along as AMD is trying to lead folks on to believe (which it's not), they might as well just paper launch the quad desktops, do only dual core on 65nm which they shold be able to get decent yields on and clock reasonably and do quad core desktop on 45nm. If they are ramping 45nm in H1'08 and they are only introducing K10 desktop parts in volume in H1'08, why bother at all with 65nm desktop parts?

Why? Of course the major problem with this is by AMD saying "ramping in H1'08" this actually means they will be installing and qualifying equipment. By the time this is done, real production wafers will be likely in Q2--> 1 quarter to process in the fab --> Q3'08 is still likely the best case.

Of course telling the financial community you are "ramping 45nm" in H1'08 sounds a heck of a lot better than the earliest parts being Q3'08 - how come no analyst was smart enough to ask AMD specifically when they expected to get 45nm production (not DVT, ES...) parts out the door? It really is amazing how easy it is to confuse the analysts and then just let them jump to their own wrong conclusions.

I bet you Scientia actually believes ramping in H1'08 means actual parts available for sale in that timeframe! Then when Q2 is coming to a close, AMD will "clarify" that everything is on schedule and initial ramping is complete and they expect to have parts out in Q3 as planned/expected. Barcelona anyone?

The parts will come out at speeds SLOWER then 65nm (as was the case on the 90nm-65nm transition). AMD will claim this is the market demanding energy efficient parts (or some other BS) - they'll announce the worlds first "'native triple core" 45nm part as a result of their manufacturing capability (read: poor initial yields) and the cycle goes round and round...you'd think at some point people would wise up!

Anonymous said...

"Yeah, that's it. It's all a conspiracy. It's just The Man keeping AMD down."

Well now that the product is "launched" anyone should (theoretically) be able to buy a part and review it - the NDA was only for those receiving early samples prior to launch. You'd also think AMD THEMSELVES WOULD HAVE DONE A FULL SUITE OF TESTING AND PUBLISHED THIS TO THE WORLD to show how good K10 is? Unless of course AMD can't buy a K10 from themselves.

It's rather humorous - you'd think someone trying to sell something that is so much better (40% better anyone?), would be eager to put out a bunch of benchmarks themselves!

If I manufactured a new model car and it went 0-60 40% faster than my competitor, do you think I would not be eager to publish that data and be eager to prove it to the world? Or maybe I should put some cars up for sale and let others test them themselves.

Rather than proving it myself - I could let my fans claim that all the car review sites are paid off and there must be something wrong with their stopwatches or their ability to measure 60mph. I will also request that my car should not be compared to cars with engines that have higher horsepower, as the only way to do a valid comparison is on a HP for HP basis. I don't care if my competitor has a car with more horesepower and can go 0-60 faster, I'll get the HP up eventually sometime in the future so you should just compare HP to HP. Or you could bore out my cylinders a bit to get the HP up - but you definitely then need to compare it to my competitors stock engine!

Peter said...

Phenom launched slowed to 2.4GHz now.


I think it's fairly safe to say now that the fastest Phenom X4 will be slower than the slowest C2Q 6600?

Tonus said...

I can understand AMD's, um... carefully worded statements to the press and to analysts. You would rather give them something to chew on and speculate about (even if it's pretty obvious what is going on) than to flat out admit that things are going badly, because this can snowball into a launch that is a disaster.

However, if you are going to do this, especially over a long and agonizing period of time during which your competitor seems to be firing on all cylinders, then you need to deliver on your promises or better. After months of PR-speak and eye-winking at press and analysts, producing CPUs that are running slower than anticipated is potentially crippling for AMD.

A week before Phenom hits the streets at lower-than-expected clock speeds, Penryn will hit the street at the announced speeds and with the impression that it is a beast of an overclocker. If Phenom doesn't show some real overclocking promise (and there is reason to assume that it will not), it may hit the enthusiast segment with a barely-audible thud.

Orthogonal said...

Big Die + new architecture + crappy process = delayed launch and low clockspeeds.

Of course the major problem with this is by AMD saying "ramping in H1'08" this actually means they will be installing and qualifying equipment.

Yes, AMD is certainly breaking one of the cardinal rules of semiconductors, new designs and new processes at the same time do not make for a happy validation process.

To be fair, you have to cut AMD a little slack. It's not so much that AMD's process is "crappy" it's more of the problem that they began HVM on an immature process only to "refine" it later. AMD and Intel are both trying to be successful business's and must make all their technical decisions with the business in mind.

Due to Intel's vast R&D budget and manufacturing capabilities, it doesn't make sense to start making product as soon as a process is functional. It is far more beneficial for them to wait until the process is mature and begin HVM when it is more practical and cheaper to do so when yields are high and process variation is low.

AMD does not have this luxury, even though it doesn't bring them the same economies of scale as Intel, their hand is forced into ramping product on an immature process in order to convince the market they are on equal technological footing. So, they begin production as soon as the process is functional, not when it is necessarily manufacturable. As a result, they must work out all the problems on the fly while and compromise resources on keeping the fleet full to capacity and refining the process at the same time.

This gives AMD the appearance of launching 65nm only a few quarters behind Intel, when in fact, process maturity is more than 18 months behind. This game will continue on 45nm when they begin "ramping" in H1'08 less than 6 months after Intel!!!! It should be noted that according to Hector Ruiz's doublespeak, Intel was "ramping" 45nm in Q3'06.

Anonymous said...

"I can understand AMD's, um... carefully worded statements to the press and to analysts."

I should say the issue is with the analysts - AMD is just trying to put lipstick on a pig. The analysts look at that pig and see a supermodel because they are told "it's a supermodel" by AMD.

Analysts are supposed to ANALYZE no? They just take everything a company tells them and pass it on without questioning it? The same thing held with Intel in the MHz/GHz war days - rather than trying to analyze the current situation themselves they just take what the companies tell them.

AMD says they are ramping in H1'08...great...what does it mean? Who cares they are "ramping in H1'08", that = good, right? Another nice job by the press.

At least AMD has seemed to learn a bit about the PR/spin game - the next lesson they will need to learn though is you can only spin so many times before someone will ask you to back it up or your credibility is completely lost. 65nm, 4x4, graphics card delays in order to do a "hard launch", mid-year K10 introduction (@2.6GHz), 40% better K10, higher speed K10's in Q4... AMD is quickly approaching the point where the press or an analyst is going to wake up and say didn't you promise this, this and that and not deliver on it? Why should I believe you anymore?

Anonymous said...

HVM = high volume manufacturing.

Don't ever confuse what AMD does with high volume manufacturing. Having a 1/2 - 3/4 filled 300mm fab does not put you into high volume manufacturing.

The problem is that because AMD only has one fab on a specific process they think they can tweak and "APM" it on the fly. If they actually had a second fab running a similar process, I think they would be more disciplined (they would have to be) about their manufacturing execution.

When you have such small volumes, piloting a change is more or less he same as converting the entire line. With 300mm the # of tools on certain steps shrink - you may only have 2 tools total for certain process steps. If you make a change to one of them...better hope it works!

SPARKS said...

"Analysts are supposed to ANALYZE no? They just take everything a company tells them and pass it on without questioning it?"

Ah, the Anal-ist thing. First and foremost, let’s get one thing straight. If anyone thinks that those bozo analists are objective, hard working, number crunching, saints of the financial/ press world, I would suggest you go to the kiddy section of your local video store and get addition information from Bugs Bunny, Mary Poppins, and Wilily Coyote.

NO one ever asks these self proclaimed wizards of the financial world what their positions are! Well, some may say that’s too personal and not for public discloser. They will not tell you what they do with THEIR money, yet they can freely suggest what you can do with yours! This comes, of course, with the appropriate and legally mandated disclaimer. Read: If you lose your balls, don’t blame me/us! THERE IS NO ACCOUNTABILITY WHEN THESE GUYS ARE WRONG! It’s just on to the next recommendation, “aah, what I said yesterday doesn’t mater today, what maters is what I am saying about TOMMOROW!!!” Besides, if they’re so brilliant why aren’t they driving the Bentley convertibles?

Look, one f**king MORON at Morgan Stanley, Mike Dipshits, decided he was going single handedly bring down all the tech leaders in one day by merely suggesting chip sales would be soft in 4Q 2007, thru 1Q 2008. Maybe he felt the sector needed a correction. Perhaps, he wanted some movement to generate some commissions for the brokers. Meanwhile, back on earth, the actual 3rd quarter numbers revealed chip demand has never been greater, worldwide!!!!. In fact now Anal-Licks are downgrading INTC because of chip shortages due to high demand!!! Well, which the F**K WAY IS IT?

They have been downgrading INTC for 3 quarters due to “Lower Margins” straight in the face of nearly 2 billion dollar quarterly profits, strong product lineup, a couple of NEW state of the art fabricating facilities, a 10% reduction in work force, AND a record 10.1 billion in 3rd quarter sales ! What the hell do these guys need, Braille and cane? Close to 40 Billion in yearly sales, 45nM power sipping 214 sq. mm supercomputers, 1 GHz overhead, share price up 35% and INTC doesn’t look good? GMAFB. These guys may as well work for AMD!!!

Then, there is the absolutely ultimate mind numbing AMD recommendations. Here is a company that lost close to 15B in 12 months. $15,000,000,000!!!!!!! Their product lineup is an absolute 65nM, antiquated FAILURE by industry standards. Their product has been relegated to the bargain bin sector of the chip world with none, nada, zip, squat, ziltch, nyet, no, profit!!!! NONE IN SIGHT!

AMD probably has, from what I read, from the insiders on this site, the worst possible worlds of very low yields on a very shaky process, compounded by a simultaneously implemented, new, and unproven architecture. 1 volt @ 2.4 GHz with 130 watt thermals! I’ve got a Q6600, as I type, that will do half that, at the same speed, at 1.3 volts, HELLO! This Barcelona abomination is leaking power like the Titanic was leaking water. Further, if I read my GURU correctly there ain’t anything they can do to stop it.

Let us not even get into the Nvidia vs. AMD thing; there is just no competition there, either. Further, NVDA is NOT going to lay down for AMD, INTC, or anyone. They have the high end market cornered and AMD MUST PRICE THEIR PRODUCTS ACCORDING TO NVDA PERFORMACE LINEUP! READ LOWER MARGINS!!!!

Therefore, AMD with all this factored in, must look GOOD!?!?

Do you know where the Titanic is presently located? Ask the Analysts, they may tell you in the Smithsonian Institution, that’s in 2009, of course! They are going down 15000 ft. with a salvation submarine named FUSION and bring it up all in one piece. After all, they have to justify the 5.5 billion dollar ATI iceberg/ catastrophe, and how wrong they all have been all along.


Anonymous said...

i feel ya sparks

InTheKnow said...

Well now that the product is "launched" anyone should (theoretically) be able to buy a part and review it - the NDA was only for those receiving early samples prior to launch.

Not if they had to sign this NDA. The report is they were trying to push this off on everyone that attended one of AMD's events where details on Barcelona were supposedly revealed.

First off, the non-disclosure agreement covered everything confidential said or written over the next two years on the product, and had a duration of five years, during which anything published or used in marketing would have to receive written approval from AMD before it could be used. Worse, at the end of the five years, all copies of the information made would have to be returned to the chipmaker.

If that doesn't provide you the ability to protect your product from any and all criticism I don't know what does.


Which is why I was wondering if they weren't using their NDA to cover for just how many problems Barcelona really has.

I just don't buy the idea that the review sites that received a Barcelona sample were "waiting for Penryn" to really bench it. That is one of the more far-fetched ideas I've seen in a while.

InTheKnow said...

Scientia said...
"Intel is also unlikely to release Nehalem at speeds faster than 3.2Ghz in 2008."

To which Peter replied...
And you know this how, exactly?

And Scientia responded with this...

I don't know if you understand about die size and yields. Nehalem will be larger than Shanghai. Nehalem is native quad so it loses die pairing. Nehalem also has a higher ratio of logic to cache circuitry than Penryn. Part of this depends on pipeline length though. If Nehalem has a longer pipeline it may indeed have a faster clock but this would still mean a slower processor. I'm simply not expecting the initial Nehalem's to be faster than Penryn (which should be pretty fast by that time).

Having Scientia question someone's knowledge of yields is really rather amusing.

First off, the discussion is about speed bins (i.e. clock speeds).

What Scientia seems to be referring to is good die as a function of die size. That has very little to do with speed bins. He is confusing a particle event with a parametric issue.

What will affect speed bins is some sort of error that affects film thickness, film variability across the wafer, litho registration issues, and a host of other things.
None of which are a direct function of die size.

I have no idea what Shanghi's die size has to do with anything, nor do I know how he can say anything about the size of a product that hasn't taped out yet.

And I know someone on this site (I'm pretty sure it was Guru) has already shot down the whole die paring thing. You don't know the speed bins until after the die have been paired.

The real limiter to Nehalem's final speed will be TDP. And based on what we are seeing out of Penryn, I wouldn't be so sure about Scientia's 3.2 GHz limit.

Anonymous said...

intheknow - the NDA was only for people who wanted an engineering sample early for review. It is obviously ridiculous, but AMD can't prevent a person or company who didn't sign an NDA from buying a product (that's theoretically available now) and writing a review about it.

Not all of the third party sites agreed to the NDA - folks like the INQ, flat out refused it as they knew why they were being asked to sign it.

I'm wondering why Intel is not taking out a full page ad in the WSJ (ala AMD a few years ago)and challenging AMD to square off with their best commercially available chip against Intel's best to see if it indeeds is 40% better as AMD advertised. Heck Intel should benchmark it as it appears AMD is incapable of benchmarking it themselves (or more specifically afraid to publish the data). At this point I would be shoving all of that native quad core/IMC/HT/4x4 crap right down AMD's throat! Thank you sir can I have another!

Anonymous said...

"What Scientia seems to be referring to is good die as a function of die size. That has very little to do with speed bins. He is confusing a particle event with a parametric issue."

Honestly Scientia know squat about Si processing, I don;t think he is confusing it with a parametric issue as he likely has know clue what that is!

Let me see if I can crawl into the mind of the great Dementia - AMD having yield and binsplit issues on 65nm K10... AMD is great so how could this be? What is one difference between AMD and Intel (other than manufacturing know how, and Si process technology) - oh yeah the dies size is bigger - therefore the issue MUST be die size related as there is no possible scenrio where AMD could have an inferior process or yields.

Therefore when Intel goes to a bigger die with Nehalem, they have to have similar issues as clearly Intel has inferior manufacturing capabilities and Si technology (I mean heck they're not even using immersion litho on 45nm - they're using cheaper, more manufacturing proven dry litho solutions - how lame is that!).

Now for reality - look at the small die size bin splits on 65nm...see any high clock K8 parts? Wonder why that is? Not die size, not new architecture....oh I get it, it must be AMD's CHOICE to do this!

As always Scientia takes one observation (die size), lacks a fundamental understanding of things going on around him (process tech, parametrics, bin splits) and tries to fit the one observation into his preformed conclusion (the K10 issue can't be an AMD specific problem)

Not sure why you guys even bother with him on these subjects - he is clearly way out of his league on these things and has proven this with his ridiculouts statements and conlusions.... I mean look at one of the last questions in his most recent blog...."Is AMD's faster adoption of Immersion a technical advantage", if he is asking this he doesn't understand lithography and manufacturing costs.

Both companies will print the same (or very similar) feature sizes on 45nm. One will do it more cheaply, on proven HVM equipment, and 1 year earlier then the rest of the industry... the other company is AMD. AMD is going to a more expensive, less proven lithography solution BECAUSE they lack the litho technical expertise to extend the 193nm further.

Or let me put it this way - would AMD be buying tools that cost nearly 2x more and are unproven in volume production if they could extend their current lithography another generation? These tools are >40Mil PER TOOL! (not that dry litho tools are cheap) I'm sure Intel will be more than happy to let AMD debug the tools, pay the upfront development costs and by the time Intel needs them on 32nm (which unfortunately for Intel in this case won't be that long after AMD is using these on 45nm) the prices should be coming down a bit.

Anonymous said...

This is my favorite part of Scientia selective memory:

"AMD may not hit 3.2Ghz on 65nm until Q4 after Shanghai has already been released on 45nm."

He's been stating 3.0GHz potentially by end of year and DEFINITELY in Q1'08 for AMD. Now he sees no further improvement beyond that until Q4? Heck AMD demo'd a 3.0GHz part and we all know AMD doesn;t cherrypick or overclock parts for a demo - forget the fact that AMD wouldn't ley anyone look at the system to see what voltage they were using or measure the chip's TDP! His twisted logic is starting to unravel.

Let me edit his comment as I think he meant to say "AMD may not hit 3.2GHz on 65nm **EVER**" (for quad core). Heck 45nm will be a challenge as AMD will be unble to scale the gat oxide any on 65nm so they will have to do some spectacular things with implant and anneal or jack the voltage (which means worse TDP's and probably even worse bin splits)

It's funny he has become like a politician - he understates everything about AMD's roadmap so he can say they met/exceeded it and he intentionally overestimates Intel's roadmap so he can say they are behind or late. Suddenly AMD getting 2.6GHz parts out the door by end of the year is execution to plan (this was the top speed planned for LAUNCH "mid-year" right?). Intel's launch of "only" a 3.16GHz 45nm part initially of course is a disappointment.

And how is Intel releasing 45nm in Q4 mean 45nm is slipping/late? Intel repeatedly said H2'08 for 45nm product availability (not ship to OEM crap, who know when it will hit the market that AMD sandbagged with on 65nm). 45nm is also out <2 years after Intel released 65nm products which is AHEAD of the standard 2 year development schedule for a tech node transition. Intel also inserted high K/metal gate one technology node ahead of all major semiconductor roadmaps (such as ITRS). But I guess they are late/behind schedule!

Anonymous said...

I love how whenever Scientia comments on some new technology from Intel, he is quick to point out how the new technology negates a positive factor in Intel's favor from the past, so essentially Intel has taken 1 step forward and 1 step back.

Like how Penryn's SSE power will make it unattractive because of high power draw so all of a sudden Griffin will be so much more competitive (To compete with Puma, Intel does have Penryn however the greater SSE performance of Penryn can only be used with much higher power draw. Some have suggested that Intel could market this as both a notebook and desktop replacement. The problem with this idea is that desktop replacement units (like I use) have brighter displays, larger speakers, larger physical size, and greater weight. You really can't get a desktop replacement without making the unit less portable.).

For Nehalem, Intel will of course lose its advantage in die size, power consumption, large cache size, and Nehalem's longer pipeline will absolutely make it not much better than Penryn. (If Nehalem has a longer pipeline it may indeed have a faster clock but this would still mean a slower processor. I'm simply not expecting the initial Nehalem's to be faster than Penryn (which should be pretty fast by that time).

Of course, whenever AMD announces something (DTX, SSE5 - hey, it's one of the top developments of 2007!), it is supposed to have some huge impact on the industry.

InTheKnow said...

Anonymous said...
Honestly Scientia know squat about Si processing, I don;t think he is confusing it with a parametric issue as he likely has know clue what that is!

In support of which Scientia said...

I already explained that. A larger die will have more defects and therefore worse binning. Also because it is monolithic Intel can't do die pairing as they do with MCM quads.

I think he has just proven the anonymous poster's point.

SPARKS said...

“Not all of the third party sites agreed to the NDA - folks like the INQ, flat out refused it as they knew why they were being asked to sign it.”

The INQ and its staff weren’t that altruistic from the beginning. The first to show their disenchantment with AMD was Digitimes. This was before the NDA fiasco. INQ’s reaction came later.

As you probably know, the INQ were vehement AMD supporters for years. Nearly the entire staff had the “Scrappy Little Company”, underdog, monopolistic, and Evil Empire thing going on. Further, with Henri Richards marketing strategy of, very effectively, courting the press, AMD was for years, the darling of the press.

The time line was revealing during the second half. Basically, AMD was in panic mode. AMD had pumped the press very badly since 2006. The press (Read: INQ) reported ANYTHING AMD said, wrote, and ejaculated. When it came time to confirm all the spin, the press woke up and realized they were taken for a ride and their integrity had been compromised. They kept quite about it hoping for an AMD miracle. It never materialized.

It wasn’t until industry veteran Mike Magee, editor of the INQ, called AMD directly to get some information. Well, shall we say he wasn’t treated like the pompous Industry veteran we have come to love and admire? He said, in so many words, ‘they nearly bit his head off’.

About the same time, he received the bad news of the AMD NDA. I believe this threw him over the edge. He did an editorial that week blasting AMD. The Fanboys were in a rage as he tried to maintain/regain editorial credibility. He has since toned down his Anti Intel stance. Unexpectedly, in this months CPU magazine, he is calling for INTC to enter the graphics market and put an end to the “cartel” of high priced AMD/ATI GPU”s. Personally, I saw him throwing Intel an olive branch.

In any event, with Henri Richards’s departure, Digitimes drawing first blood, and Mike Magee maintaining editorial integrity, AMD’s free fide with the press has come to close. They have all followed suit. That said, the tech press is far from actually criticizing AMD but the ‘flavor’ of their reporting has become a bit more objective. Besides, to quickly do an about face would be admitting to erroneously publishing all the spin and Power Point Presentations AMD hyped for nearly a YEAR.

Further, I believe the financial community is in the same predicament. However, this has to do with something a bit more substantive than editorial license.

We’re talking MONEY, BIG MONEY! Someone, somewhere, WILL be held accountable for losing all those billions, especially in the financial institutions. The Barcelona/ATI fiasco has only just begun. I wouldn’t be surprised AMD executives wind up in court explaining why they mislead investors with months of false claims.


Anonymous said...

"I think he has just proven the anonymous poster's point." (regarding Dementia)

His latest comments:

"We haven't yet seen AMD's 45nm to know what type of power saving it might have. Intel's 45nm could be a lot better or only slightly better. I do expect Intel's to be at least some better. If Intel's is a lot better then AMD may decide to go with high K on 45nm afterall in 2009."

Hmmm.... this goes to my last point about trying to understate AMD's capabilities so he can talk them up later... He is now EXPECTING AMd's process to be AT LEAST "a little worse" and hold out the possibility of "much worse". In so doing he has layed the foundation for the inevitable future comment - I expected AMD to be far worse and things are better than expected! Much like K10 performance and clockspeeds - he now calls the Phenom speeds EXPECTED? He didn't say AT LEAST 2.6GHz in Q4, if not possibly 3.0GHz in Q4?

Why would AMD be worse on 45nm, I mean they do have SOI and immersion right? Oh yeah those things are PR which have no real gain attributable to them (especially immersion)... AMD will get some gains from the overall Vt (transistor threshold voltage) reduction on the tech node, however with the lack of scaling of the gate they will have a difficult reducing it and Vcore significantly without the leakage problem growing (exponentially). SOI or immersion
will do NOTHING to the physics on this! So AMD has the devilish choice of low clockspeeds with reasonable TDP's or higher clockspeeds with high TDP's (see AMD 65nm process and K10 for additional learnings!)

As for AMD using high K in 2009 if Intel turns out to be much better (which by the way they will be) - it's not like AMD can just simply CHOOSE when to implement this technology. It involves new tools to be put in the fab, new integration, reliability testing, etc.. If AMD could do this in 2009 they will - it's not a matter of 'we have it in our pocket and we'll see if we need it' Ok guys turn on the old APM3.0 high K switch looks like we need it - you;ll have that ready to go later today, right?

Just what is AMD supposed to do in their fabs for 45nm - do they leave space for these tools in case they need them (which would mean potentially an inefficient fab layout if they don't get around to it). Do they spend the extra money now and put the tools in (yeah like AMD has that cash to burn right now). This is yet another one of the huge differences between the CTI AMD approach and the Intel get it done before you ramp approach.

The problem with just inserting high K, is it changes MANY steps in the processing it's not just the actual step to deposit the film! You are talking new equipment, chemicals, integration, testing structures, and many changes to numerous implant, anneal and other front end steps.

Why would AMD do this? It only makes sense if you do it on the bulk of the technology node. - Dementia has claimed AMD will continue to be on an "accelerated" (in his world) schedule and will have 32nm in early 2010 to further close the gap with Intel, so they will use high K on 45nm for what 6 months (?) and then be forced to re-tune it for 32nm?

When I read well, frankly, ignorant comments like these I wonder if he is aware of his lack of knowledge and is intentionally trying to mislead people or if he just doesn't understand the complexities of these things and thinks things are really as simple as he believes them to be. Either way it is pretty damn funny!

Anonymous said...

"I already explained that. A larger die will have more defects and therefore worse binning"

Apparently Dementia doesn't understand the difference "binning" and yield as somone else noted earlier in this blog. More defects means yield issues (nonfunctional die). Bigger die doesn't necessarily mean worse BINNING unless you have a process that is crap (AMD 65nm) or a design that is on a cliff with respect to the process (K10).

Intel designs the processor with manufacturing in mind, AMD designs and then tries to figure out how to make it. You can mock Intel all you want for an inferior FSB design, offboard memory controller and MCM.... but these were all design decisions made with manufacturng, cost and time to market in mind. I would expect Nehalem to be the same - if it were not manufacturable then Intel would stick with the "inferior" FSB design

Tonus said...

I was under the impression that it's been the INQ's policy not to sign NDAs. It's not as bad a policy for them as you might think, since they're a news site and not really a hardware review shop.

If they didn't sign the NDA to be allowed to get pre-release CPUs from AMD, it probably isn't because they felt AMD was running a dirty deal, but because of their own policy.

Axel said...

More evidence that in games, Phenom X4 will be significantly slower than Kentsfield per clock, even at 3.0 GHz. Rahul Sood's claim from a couple months ago that Phenom 3.0 GHz would "kick the living crap" out of any processor then on the market will soon be proven to have been utter unfounded fallacy.

We can see that Crysis gains significantly in performance going from K8 dual core to K10 quad core, yet even the Intel dual core E6850 beats Phenom X4 clock-for-clock.

Anonymous said...

let me preview the next hot topics over at Amdzone:

"Crysis is unfairly optimized for Intel processors."

"The 3GHz Phenom is unfairly disadvantaged because it's memory clock is running at 350MHz."

"Phenom is unfairly disadvantaged because it's L3 cache is only 2MB."

"C2D cheats at benchmarks because single-threaded processes can use the entire 4MB/6MB cache."

"That source, just like Anandtech and Tomshardware, is obviously paid off by Intel."


Anonymous said...

Phenom Disappointment


clock for clock comparisons show Phenom can't compete with Penryn.

Abinstein, Scientia, and others busy working with AMD to come up with excuses

Anonymous said...

From the previous link:

"Unfortunately, it's becoming clearer and clearer why a triple-core version has become a necessity - at least then there's more chance of cores with a decent clock speed. A weak core in any quartet can simply be disabled and a triple-core CPU created."

Unfortunately it's becoming clearer and clearer that the press has nary a clue about Si processing and how things work. (Though it is fun to watch these folks with no background commment on it ala Scientia. Of course Scientia is at least doing it in an AMD fan blog, these "journalists" are spreading it more under the guise of truth).

Tri-Core is about YIELD, not binsplits! With the exception of the very edge of the wafer you will not have wild clockspeed swings from core to core. The cores may have binsplit (clockspeed and/or power) issues in general but these would be limited by specific speed paths inside a core or global process variation.

For quad cores you are talking 283mm2 - lets sat 20mm x 14mm for argument's sake. Now that puts each core at ~10x7 mm - do you really think there is that much clock variability on cores 10mm apart?

Again, tri-core is a reponse to YIELD (non-working) issue, there may be MARGINAL power or speed benefits but it's not like you have quads with 3 cores operating at 3.0GHz and 1 core working @ 2.4GHz, therefor you can magically turn on e off and get these great clock increase - that is not what is the cause of the low clockspeeds on the quads...

...the problem is power - look at the relatvely low Vcore on the ES of the Phenom chip - this is lower than Intel's typical 65nm Vcore, and yet they were only operating at 2.4GHz (or 2.3?). AMD should (theoretically) be able to increase the Vcore and get better clocks - the fact that they don't (or can't?) leads me to believe that power goes out of control with higher Vcores (which could be either a design or, in my view, more likely a 65nm issue given AMD's inability to get even K8 clocks up on 65nm).

It is interesting that the underdog, let's give AMD the benefit of the doubt, press coverage is starting to go away.

And the kicker in the article:
"Oh well - at least AMD still has its graphics division to fall back on. That's one area where AMD does have a technological advantage in manufacturing over its major competitor.'

AMD does use a foundry for ALL OF THEIR GRAPHICS PARTS...

Ho Ho said...

"at least AMD still has its graphics division to fall back on"

I wonder how it works with having around $200M total revenue and millions of losses for graphics division in last quarter

Tonus said...

"Technological advantage"? Their best part is currently slower than their primary competition's mid-range product!

luvs otellini said...

Robo knows all about leapfrog, lol. He is great when he's on top or when he's on bottom. Of course it was more banging than leaping. Bring the vaseline!