AMD Post Q2 Loss

From AMD:
SUNNYVALE, Calif.--(BUSINESS WIRE)--AMD (NYSE:AMD - News) today reported financial results for the quarter ended June 30, 2007(1). AMD reported second quarter 2007 revenue of $1.378 billion, an operating loss of $457 million, and a net loss of $600 million, or $1.09 per share... continue here.

AMD's results shows a good rebound from the previous quarter. None of this comes as a surprise as I've mentioned several times how AMD played with its Q4-Q1 numbers. Stuffed channel, bad product mix and cancelled ordered often gives you such awful results that going back in line with seasonality can appear like significant gains. Only when you compare the numbers to Q2 2006 will you have a better perspective and see the cracks in AMD's business model.

But the good news indeed is that AMD is back within seasonal trends. The desktop market did rebound this quarter but the big gain for AMD is in the mobile market. Design wins in the mobile commercial space is a positive sign for AMD. AMD's strategy going forward is to increase mobile mix and scale down desktop shipment (and not a single word about DTX, imagine that). This furher clarifies why Intel plans to focus all marketing efforts towards the mobile segment. As AMD is looking at this segment as fertile ground to increase margins, Intel is definitely not happy with this development.

As AMD recommits itself to gaining unit share focusing on the mobile segment, this should send shivers down the spine of the margin-oriented investors out there. The good news for Intel is that AMD seemed to be focused on the value segment. I can't imagine how many times Hector mentioned the word VALUE in his mini speech. AMD suggests that nobody cares about the size of the die, the process node nor the raw performance of the processor. The customers only care about choice, how the product will respond to their needs and whether it is a "native quad core" or not. And since AMD said that they are in the "forefront" of this shift in consumer attitude, this should allow Intel to maintain the useless performance leadership throughout the remainder of the year.

While I find it facinating that there was no mention of the word MONOPOLY during this earnings report, AMD did say that the litigation againts Intel is going very well. Subpoenaed customers who lost all their rebates from Intel are delighted about how free the market has become. Maybe they meant "free" literally.

With regards to Barcelona, AMD mentioned that it wasn't the yield that was causing the low speeds but instead it was the complexity of the design and are working on fixing the problem soon. For a Q3 product shipment, saying such things this late is alarming. I definitely prefer to have yield problems over design problems when you're this close to launch. But this shouldn't be a problem as AMD is planning a scaled introduction of Barcelona. Luckily they're expecting a scaled acceptance of its eco-friendly processors anyway. AMD confirms that their non-performance focused customers like SUN and CRAY who are planning to build supercomputers are quite happy with what they see.

When asked about its asset-lite strategy, AMD declined to comment on future plans which hints to a big announcement sometime in the future. Looking at the scaling down of CAPEX for the Fab30 upgrade, I am inclined to think that Fab38 may skip a process node or two as AMD will try to minimize expense while increasing reliance on foundries. AMD's major cash problems continues with a negative flow in the region of $900M for the last quarter. It is obvious how this is limiting AMD's choices in expanding capacity and other long term investments.

Other notable items include how AMD was forced to write-off $30M worth of inventory simply because the CPU's are with DDR1 integrated memory controllers. For the 32nm node, AMD is considering using BULK silicon instead of SOI. That should be the final word in that silicon wafer argument.

Overall, a bit of a good news as AMD shows signs that its business is back in line with seasonality. That should create stability in its financials and improve guidance. But at the same time, AMD's problems are starting to show some degree of permanency. AMD cannot continue to do the same things and expect different results. So while its insistence on gaining unit share is making some investors a bit nervous, its silence on the asset-lite strategy, coupled with a solid line up of consumer OEMs, are giving the impression that there is hope after all. And since AMD and Intel are measured with a different set of standards, sometimes for AMD, doing bad can sometimes be good enough.


Anonymous said...

(and not a single word about DTX, imagine that).

Oh lawd thank ya! Poor Scientia.

Anonymous said...


Anonymous said...

"For the 32nm node, AMD is considering using BULK silicon instead of SOI"

Perhaps now the AMD fans, who have absolutely no process background (Scientia, Shari-kook, Abinstein, et al...) yet insist SOI is better (because this is what AMD does) may actually try to educate themselves.

The main source of leakage which SOI addresses is junction leakage; this is considerably insignificant on offstate power consumption when you look at gate leakage (something that High K addresses) and subthreshold leakage (SOI process design can be tweaked a bit to help in this area). Of course on active power, which is still the majority of the overall TDP, SOI does nothing.

SOI does manage to increase manufacturing costs and complexity though... mo' expensive, mo' complicated = mo' better?

So for all of those idiots who kept insisting SOI...look at power...look at Athlon 90nm vs P4 65nm...blah,blah,blah... perhaps now you can buy a clue and also realize that the same 65nm and 90nm "inferior" bulk Si processes also produced low power mobile chips - hey maybe chip architecture plays an important role? If folks really want to learn, look at the Ion/Ioff ratios for the various process nodes that are reported by most major IC manufacturers.

Oh and so much for ZRAM, eh? Big show, big PR, little actual value... though I do think we will see some form of 1C/1T (vs current 6T SRAM) cells for both Intel and AMD in the future - of course you don't need SOI for this though...

Perhaps now Scientia can write an article about the 32nm SOI barrier if AMD goes back to bulk. You know, you take a single observation and you create a theory around it...of course this would be entirely incorrect (much like the 3.0GHz barrier crap he is spewing) but if it looks like it fits some basic observations it must be true, no?

Anonymous said...

"and scale down desktop shipment"

I wonder how this Dell is going to take this... Hmmm... they played the AMD card on Intel, lost all of their pricing deals with Intel, and now AMD is scaling down... well done Dell!

'AMD suggests that nobody cares about the size of the die, the process node nor the raw performance of the processor. The customers only care about choice, how the product will respond to their needs and whether it is a "native quad core" or not.'

I like the sarcasm (?). Hey forget about raw perfromance and tech node, but hey you really need to care about whether something is MCM or "native". I'm curious as to why noone ever calls AMD out on this...

And by the way VALUE sounds better than CHEAP or LOW END... at least AMD is starting to get the PR thing down...

One thing to keep in mind is AMD's mobile share has always been lower than their overall market share, so faster growth in this area should be expected... when mobile catches up to the rest of the their average X86 market share the real question will be can they break through this level. The other obvious fact is as this segment grows it gets harder to sustain growth... achieving a 50% increase going from 8 -> 12% is far different than say a 50% increas from 20 -> 30% (these are made up #'s to illustrate a point)

SPARKS said...

“AMD’s position----bla----bla----bla”
“Regaining market share---bla---bla---bla”
“Barcelona at 2.5---bla---bla---bla”

The REAL story is doing a Google search on E6850. It seems the ENTIRE PLANET has been drop dead fixated and waiting for the HARD choice of spending their money on this or the Q6600. These things will put INTC back to the traditional 9.0 to 9.5 B levels. These two chips are and will be AMD’s WORST NIGHTMARE! They thought the E6600 was a killer? At $250 to $300 there is absolutely no contest in the market, none! At $250 a FX-62 is a joke by comparison and the choice is a no brainer. This will be HUGE.

I know I’m in, for my wife’s new machine, just for FUN! (I’ll wait for X38 and Penryn XE, thank you)

If you ever wanted to know why AMD’s preempted July 10 took place, here’s your answer. Watch these two chips FLY of the shelves.

Do the search for kicks and giggles. The forums are absolutely manic with which INTC chip to spend their ~300 bucks on.


SPARKS said...

Oh, by the way.


sparks said...



Giant said...

Nice links SPARKS, thanks. It will be tempting to upgrade to a Penryn CPU. SSE4 for video encoding would be worth it alone for me. It's socket compatible with most Core 2 boards as well, the VRM has not changed. All that's required is a BIOS upgrade.

I've seen some people reporting that Samsung might buy AMD. These reports are laughably wrong. I invite you to read the x86 licence agreement between AMD and Intel:-


Go to part 6, section 6.2 Termination for Cause.

It lists that the license will be terminated if:

(1) the filing by the other party of a petition in
bankruptcy or insolvency;

(2) any adjudication that the other party is bankrupt or

(3) the filing by the other party of any petition or answer
seeking reorganization, readjustment or arrangement of
its business under any law relating to bankruptcy or

(4) the appointment of a receiver for all or substantially
all of the property of the other party;

(5) the making by the other party of any assignment for the
benefit of creditors;

(6) the institution of any proceedings for the liquidation
or winding up of the other party's business or for the
termination of its corporate charter;

(7) the other party undergoes a Change of Control. For
purposes of this Section 6.2(b)(7), "Change of Control"
shall mean a transaction or a series of related
transactions in which (i) one or more related parties
who did not previously own at least a fifty percent
(50%) interest in a party to this Agreement obtain at
least a fifty percent (50%) interest in such party, and,
in the reasonable business judgment of the other party
to this Agreement, such change in ownership will have a
material effect on the other party's business, or (ii) a
party acquires, by merger, acquisition of assets or
otherwise, all or any portion of another legal entity
such that either the assets or market value of such
party after the close of such transaction are greater
than one and one third (1 1/3) of the assets or market
value of such party prior to such transaction.

That will pretty much kill the transfer of the x86 license with Intel. According to the contract, the license does not transfer with a sale, acquisition, merger, or bankruptcy of AMD. It just gets revoked.

So when AMD goes bankrupt that is the end of it. A company like Samsung COULD buy AMD, but they would not be able to produce any x86 CPUs. Intel would terminate the license as per the terms of the contract.

SPARKS said...

Thats It, Giant! Excellent, I knew it was there, but actually reading it was like the Holy Grail!

The big money will not let the LAST remaining x86 license go by the way of Cyrix! They are going to pump, pimp, and pamper AMD till it cost them BILLIONS. ITS THE x86 LICENSE THEY DON'T WANT TO DIE!

Thanks buddy, it all very clear to me now!


Anonymous said...

This reeks of watergate. The only Brisbane is better is because of new sleep state, not process, best bins are for the benchmarking chips, while the junk bins are 50% more hungry than their 90nm counterparts!.

Anonymous said...


This is a good post. Good insight/detective work on AMD's SOI issues


Anonymous said...

So in Q1 Scientia's logic was - it's only 1 quarter of results, that's not real and market share #'s are only an anomaly.

In Q2, it is well the loss was just as bad as Q1 but things will probably get better. The other logic is AMD is making more per chip (yet somehow losing the same amount of money as Q1). Kind of some interesting logic when you factor in AMD claims a 38% unit volume increase, flat profits.... somehow despite the fact that AMD's shipments went up 38% and Scientia's claim of AMD making more money per unit - net profit was flat...

Looks like someone has to learn the difference between GROSS MARGIN and PROFIT MARGIN.

Where's the objective analysis? At what point is the tomorrow will be better argument going to ring hollow even in his mind...

AMD screwed the pooch strategically about 1 year ago... they could have continued to amass profit which would have given them more flexibility to expand capacity and pay for ATI a bit more easily. But Hector wanted 30% market share at all cost... so they slashed prices on products they were selling well and for profit.

They now sell more units, but lose money and as a result of losing money, debt increase which forces higher interest which forces AMD to attempt to sell more units.

Unfortunately since they don't have money they have to slow capacity expansion which makes it harder to make more units and get back the money to pay the debt.

This is much like a game of risk where someone decides to do a land grab - looks really good for awhile and then they get eaten as they have grown too quickly and can't support the massive growth.

SPARKS said...

Doc, as have been learning a bit about chip production on the site, is there any substance to this? What does it mean? Bad CORNERS?



Anonymous said...

Sparks, FUD is likely referring to die at the edge of the wafer which typically have more variation, yield lower, and don't perform as well as die from the center.

This is also is a bigger hit on "NATIVE" designs as if you only have a certain radius where performance starts falling off (or varying) you get hit worse with bigger die... With MCM you can at least match up chips with similar variation in order to get similar binsplits (whether it be power or speed).

There is also some speculation that SOI has more process variation and/or is more sensitive to small variation which leads to a double whammy for AMD.

Of course Scientia and Sharikou will have you believe SOI is better and has lower leakage, which definitely SOUNDS good, though there is NO DATA to support this. Furthermore they (at least Sharikou) will tell you APM3.0 kicks in and gives absolutely ZERO variation across the wafer. :)

SPARKS said...

As I understand it, this is a photo lithography technique, whose convergence is less than optimal at the edge of the wafer; yes? As such, the scores of layers have variations between each layer? Is it fair to speculate that each subsequent layer adds more errors to the final product? Like, say, outer perimeter miss-convergence on CRT’s, times 30 or 40, (yes this dates me). It would seem there is an angular progression of error that increases as you move from the center of the plate. It then follows, the art, in which INTC has mastered, has yet to be refined by AMD. (Substitute those company names with genius engineers)

So,during the last 18 month AMD bet the house on:

The newly adopted, perhaps, rushed 300mm wafer.
The 65nM die shrink.
SOI, (I’m afraid I don’t know the benefits as apposed to the risk)
A relentless insistence on manufacturing a relatively large, native quad core.

It sounds like there was more to the “perfect storm” than was actually revealed.

The question, therefore begs, is this problematic for SOI processes? If SOI presents itself as a more sensitive process, than indeed, AMD cannot rectify these issues by mere “tweaks” and “stepping” under the strictest control; yes? Will outsourcing, under less than optimal conditions, exacerbate these problematic issues? Can they be adequately addressed?

INTC knew this single die 4 core process would be a pain in the ass, especially at the 300mm perimeter, compounded by an especially difficult process. AMD big shots didn’t listen to the boys in the field (you guys who cook this stuff) and went with it anyway.

Wreckor Ruinz and his minions, therefore, drove the company into the ground on two fronts, economically, and technologically.

Thanks for the insight.


Roborat, Ph. D. said...

SPARKs said: "What does it mean? Bad CORNERS?

defective dies close to the edge of the wafer is quite common and i wouldn't put too much weight on the claim unless a specific reason was identified. But if this is indeed true then i wouldn't be surprised that AMD is having problems with cross wafer variation (probably mainly during etch or diffusion - tough for large wafers. photo process issues tend to show patterning and not isolated at the edge). AMD hasn't perfected manufacturing at 300mm wafers yet, couple that with its rushed 65nm then it's quite easy to see how edge dies are failing.

Anonymous said...

I don't think the issue is 300mm (unless it is specifically the 300mm SOI wafers). 300mm equipment has been around for some time now and most processes are fairly mature. One issue moving forward (which is why you probably hear the rumors about AMD looking at bulk again) is that for a fully depleted SOI process, which is what you really need to get the full benefit of SOI, you need a VERY uniform and thin active Si area (uniformities on the order of <10A (~3 atoms) across a wafer. On 90nm AMD was using a PD approach which allow thicker SOI (thicker active layer), not sure about 65nm (I assume it is also a partially depleted approach).

The 65mn process on the other hand is the more likely culprit - the SiO2 gate oxide couldn't be scaled traditionally like in past generations to get speed, and even very minimal scaling would lead to leakage issues galore (gate leakage goes up exponentially with thickness). AMD is also likely pushing the envelop with the strain techniques (they brag about using 4 vs Intel's 2 which is a joke as it means they need a more complicated process to do the same thing!) - this also could be leading to issue. The strain techniques are also VERY sensitive to pattern so what worked well on K8 may not work on K10... (or vice versa)

Couple this with any marginalities either in implant, etch, anneal or litho and you would have pretty good process variation regardless of APM3.0 or APM20.0!

Remember IBM's cell yields were MISERABLE for PS3... IBM is great at coming up with top notch research processes, manufacturing is a WHOLE different ballgame. Intel designs and develops it's process technology with manufacturing in mind (they even have engineers working in the high volume fabs do a temporary stint at D1d at the end of development) and will often tradeoff a litlle bit of performance for better yield or a wider process window. One aspect of this is that Intel's development process leads right into manufacturing and the process is essentially done.

Many who don't understand manufacturing mock or downplay this approach (Sharikook/Scientia), however it is far more stable and predictable than AMD"s continuous improvement approach which sounds great on paper but in manufacturing can get messy.

Anonymous said...

"With regards to Barcelona, AMD mentioned that it wasn't the yield that was causing the low speeds but instead it was the complexity of the design and are working on fixing the problem soon."

Funny how long ago was it when AMD said everything was on schedule/no issues with Barcelona?

Now the spin starts... well not a manufacturing issues, JUST a design issue. Well we paper launched some products 3-6 speed bins down (depending on how you count speed bins)... but hey we said mid-2007 launch and by gosh we met that promise!

I wonder if they could simulate some benchmarks on how much of a design issue it is... and simulate how much money they would have earned... they could include this on the Q3 earnings report... just add a "simulated Q3" column next to the "actual Q3" column....