12.12.2007

AMD's Financial Analyst Meeting

AMD is holding its annual Financial Analyst Meeting on Dec 13, 2007. Like many analysts, I am beginning to wonder what benefit would anyone get attending this PR exercise. There was a time when AMD held similar events and anyone participating would only get straight answers. Today it’s all about vague promises, secrecy and if you’re lucky enough to get a definite answer it’s always a million miles off target. Take for instance last years Analyst Day (Dec 14, 2006). Everyone clearly remember this as the last rosy presentation from AMD. Despite the dark Core2-cloud looming overhead, business was good and the company was in a position to take control of 30% of the overall market. As we all later found out, the rosy outlook was quickly followed by an earnings warning; the first of the series of massive half a billion dollar losses.

If we were to consider the added value of AMD holding another financial analyst day, we should first look at the track record of the last one held. In summary, here is what AMD projected for 2007:
K10 quad-core ramp: 2H’07; actual result: pushed out possible mid Q1'08
Barcelona performance: 40% better; actual result: ~40% worse (non-compliant SPEC benchmarks)
CAPEX: $2.5B; actual result: 2007 estimate will be at $1.7B (Fab38 delayed)
Revenue (long term target): ~$7.6B; actual result: $6.02B (average analyst estimates)
Gross Margins: 50+/-2%; actual result: 35% (last 3 qtrs)
2007 growth: 10% above industry (16%); actual result: -455%

As you can see, you’re probably better off using monkeys throwing darts at targets than rely on AMD to assess its own outlook. That's also because we know that monkeys have no intention to look good in order to keep their jobs. On a positive note for AMD, since they got last years outlook absolutely wrong, getting at least one prediction right would put them infinitely better in assessing their own future.

89 comments:

Tonus said...

Small correction: Last year's Analyst Day would be Dec 14 2006, not 2007. :)

AMD has to be more forthcoming with bad news at a time like this, because I think they're eventually going to be treated like the boy who cried wolf, in that when they finally do have some legitimate good news to report, it'll be met with apathy and ridicule.

Better to aim at a reasonable target, so that if you fall short it won't be by a lot, and if you surpass it you generate enthusiasm. Aiming high and then falling short again and again just leaves people frustrated and resentful. Especially when it seems that we are being strung along by AMD PR.

Chuckula said...

Here's one more bit of bad news that is 100% self-inflicted: Hector ain't going away. So I guess this means, more bitching & whining about how AMD invented sand, the Internet, memory, motherboards, CPUs, etc. etc. while at the same time anyone talented at AMD is viciously forced out in favor of Hector's crew of cronies from Motorola (after sinking one ship, jump on another one).

Whee-hoo, a promise of one more year of big talk and little results, coupled with bitching and moaning that it's all Intel's fault since they actually work.

Eddie said...

Roborat64: Good article, I was also going to write about this subject for my blog, now I will link to yours and focus on aspects.

I wanted to also comment that just like you said, AMD used to give straight answers and they were not always good news. If something makes me sad is how AMD's credibility has crashed faster than the stock price.

On "the other street", Intel's management have began to sound reasonable.

This is something interesting, I suspect that there is an underlying principle to learn about investing in companies whether their management are in minimization of the negative or shooting straight answers slightly pessimistic.

Roborat, Ph.D said...

thanks for the correction...

this was a quick warning to anyone listening to what AMD have to say tomorrow. I really did not have time to go into more detail. Like for instance AMD's plans for its asset-lite strategy, how much the goodwill impairment charge will be and its expense next year. AMD needs to pay about $5B in contractual obligations, mostly to its silent partners for the next years until 2012, thats when some of its notes expires, which is another $5B more. Cashflow and financing will be key. And of course you have the K10 problem clouding any chance of a competetive recovery.

Anonymous said...

"Here's one more bit of bad news that is 100% self-inflicted: Hector ain't going away."

Chuckula - Ruiz may not be PLANING to go away, but ultimately at any point the board could step in and have him removed. The only thing that means is Hector is not planning to resign anytime soon. If the board wasn't asleep at the wheel Hector would be gone already.

The gross margin estimate last year vs actual is stunning. It would be rather interesting when (if?) AMD gives guidance for 2008, they show how they fared on the 2007 guidance.

The one dynamic to keep in mind last year is AMD was looking to secure loans and get as favorable terms as possible - they also had to worry about their credit rating which would dictate the interest on the loans (not that this excuses the behavior). Obviously, they KNEW what Q4 was looking like - heck they were 2.5 months into the quarter and didn't realize the massive shortfall they soon reported after the analyst meeting? If they didn't know at that point then the CFO should have been fired instantly.

This year, while they still could use cash infusion, they will not get away with the pie in the sky estimates so they may as well come clean.

Anonymous said...

http://www.eetimes.com/news/semi/showArticle.jhtml;jsessionid=WSUFVVEUM1VPAQSNDLPSKHSCJUNN2JVN?articleID=204801525

Offtopic - but finally a site that understands tech (EETimes is a good site).

"John Pellerin, AMD's director of logic technology development and project leader on a joint development effort with IBM Corp., said the company expects to start shipping the new processors in the second half of 2008."

So this whole ramping in H1'08 is what is...ramping. Notice "shipping" in H2'08, no details on AVAILABILITY for purchase - shipping could mean samples, DVT/EVT chips or actual product to be sold. Recall 65nm "shipping" by end of 2007.

In either case this CRAP about AMD catching up is just that...crap... it looks like AMD has managed not to LOSE more time on schedule, but when you consider what the performance of AMD's 45nm without high K will be, it is easy to see they are falling behind further. And if you have any doubt about this:

'We're not selling process technology," he stressed.'

We've seen statements like this from AMD enough to know what this is code for.

'"We're comfortable with the maturity of our yields" he added.'

Hmmm...I think we are familiar with the "comfortable" code too...weren't/aren't they comfortable with 65nm too? THIS IS A MEANINGLESS STATEMENT - what else is he going to say?!?!

Oh by the way they are "retaining the option" of including high K/MG in 45nm. Of course they are "ramping" 45nm in H1'08 which would seemingly be when the line and the tooling would need to be largely in place...

So let me know if anyone needs me to translate "retaining the option" of using high K on 45nm - there are 2 scenarios in which I can see this happening.

Scott said...

Great article, one thing, I think it should be "worse" not "worst". Sorry, my wife's a teacher...

Roborat, Ph.D said...

Scott said:
"worse" not "worst". Sorry, my wife's a teacher...


corrected, thank you. I hope she doesn't make you raise your hand when you have a question.

'We're not selling process technology'.
they seem to be not selling a lot of things lately ;)

SPARKS said...

From what you process guys have said, doing memory is a lot easier than doing logic, yes?

Additionally, IBM’s SOI, with all it previously mentioned benefits has proven, as of late, to be a miserable failure for AMD.

Fudzilla has posted another amazing bit of AMD/IBM technological miracle in the works, in 2009 no less, WITH Hi-k.

Can they make the jump from memory to logic?
Can Hi-k be made to ‘stick’ on SOI?
Can all this happen at 32nM when they can’t get the thing up to speed at 65nM without producing a miniature space heater?
Is this report, basically, full of shit?

Or, is my amateur status in process understanding got the better of me?

http://www.fudzilla.com/index.php?option=com_content&task=view&id=4685&Itemid=1

SPARKS

Orthogonal said...

It's interesting that AMD would drop a bomb like the ATI writedown just before the Financial Analyst meeting, especially since all guidance going into this quarter was that they were going to "break even". It's like they're trying to spin the situation any way they can to get attention off the fact that the core CPU business is in dire straights. It almost certainly looks like they are going to miss their quarter estimates and since they were going to miss, you might as well throw all the bad news in you can.

Funny that they would issue a writedown when the Graphics/Chipset portion of their product portfolio is actually doing ok, they're atleast close to breaking even, while the main CPU business is the real tanker on the balance sheet. It's like they're using ATI as an excuse to in essence subsidize losses on the CPU side of things.

I don't think I've ever been so anxious to hear an AMD financial analyst meeting before.

JumpingJack said...

Can they make the jump from memory to logic?
SRAM is made with similar transitors as logic so the there is no real jump, in fact, because of the order nature of SRAM, the tight density it is often the key test vehicle for new process techniologies. To be frank, SRAM is commonly constructed from 6 transistor to make 1 bit cell (this is that cell size they refer to). Making that jump is not the issue... they are using SRAM to stress the process conditions.


Can Hi-k be made to ‘stick’ on SOI?
Most certainly, an SOI wafer is no different than a bulk wafer right at the surface (where the high-k will be deposited), SOI interfers with other processing types but would not interfer with high-K implementation, other than thermal processing -- SOI causes different thermal characteristics of the substrate which must be accounted for....

Can all this happen at 32nM when they can’t get the thing up to speed at 65nM without producing a miniature space heater?
Sure, the announcement of functional SRAM is just a milestone, Intel announces this milestone as well as many others ... typically estimate a year to year and a half to completion.



Is this report, basically, full of shit? No, but I have skepticism with any 'mainstream' press release from IBM in regards to accomplishments. IBM is a chest thumper, they like to be recognized as the only technology leader from any perspective. They feel tremendously one-UPped by Intel with the high-k announcement and Intel's functional SRAM a few months ago... they are in a pee-ing contest right now. My suspicion is they got one die to yield a handful of switchable bits and called it good. That is just me speculating. Even if this is the case, it is indeed a great accomplishement.

Anonymous said...

'Making that jump is not the issue...' (from SRAM to logic)

JJ - I would agree for the most part, but you do not see pattern effects on pure SRAM vehicles which you will see on logic. While dummification (see below) helps, you can have specific litho, etch, and strain issues on logic portions which may not have the repeatability of the SRAM structures. That said for the most part SRAM is a very good INITIAL overall vehicle to test the process.

"Sure, the announcement of functional SRAM is just a milestone"'

To expand further keep in mind FUNCTIONAL SRAM does not say anything about speed or power...functional SRAM doesn't mean you have a process hitting the targets.

"My suspicion is they got one die to yield a handful of switchable bits and called it good."

I'm sure they had at least 2 die working! If they said functional SRAM though that likely means a large block of memory works within the die, if not the whole die (not just a few bits). While IBM is 'colorful' with it's announcements I'll give them a little more credit.

That said, IBM does tend to jump the gun on announcements and this by no means means high performance, high yield, high volume capable process - IBM has a tendency to announce on feasibility. Intel is generally much more conservative, unless they are clearly delineating it as a research project (like Si laser, waveguide and othe various announcements which are still a ways from production).

While this announcement will get some play - Intel is FAR into development on 32nm and is in the get it ready for manufacturing stage - the difference is you will not see Intel announce details until the process gets close to ramp (mid-late 2009). Though you will likely here the occasional first product taped out, etc... just no details on the actual process flow.

* for those wondering dummification is where "dummy" structures are intentionally put in to make the wafer more homogenous to help with process steps that are sensitive to patterns and pattern density

Anonymous said...

One other thing about 32nm... it is clear what AMD's strategy is from the recent stuff leaking out (and AMD's comments on the EEtimes link).

45nm will essentially be a dumb shrink of 65nm - there will likely be some slight enhancements but basically it will be the same flow with smaller dimensions. Keep in mind immersion litho (which is WAY OVERHYPED) does not do a single thing for performance - it is simply an alternate way to print the small features (more or less, I'm simplifying a bit). People can choose to call it more advance or leading edge than Intel's dry double print process, but in the end both suppliers will have similar feature size, but Intel will be doing it cheaper and on more proven equipment.

Because of all this, AMD will not get much performance out of 45nm - they have already previously indicated only a ~20% transistor gain on 45nm (keep in mind they claimed >40% with transition to 65nm and typically at least 30% is targeted). The 20% gain may also be dubious as they may be throwing in the active power gains from the lower Vt of the 45nm process.

In any event, AMD should be able to ramp 45nm quickly as a result (or I should say as well as they did 65nm) - this may provide some economic relief via smaller die size but it will not give much performance help (and you will therefor likely see further migration to the "value" philosophy). I honestly don't see any clockspeed gains from 45nm (you may see some gains from architecture/design tweaks)

The real question will be how quickly they can get 32nm up as that will be the first major process gain they will see in the forseeable future, and there is an outside chance of putting it into the 45nm flow - though to me that would seem to be foolish as the design would need to be re-optimized on 45nm for high K. If you are going to do this on 32nm anyway why would you go through another whole set of tapeouts and debug to get the high K benefit on 45nm for a limited time.

I think the high K on 45nm 'is an option' is a hedge if the 32nm schedule slips, or if they really just hit a wall on power on 45nm (which is a small but real possibility). In any scenario, AMD implementing high K on 45nm at any point will mean something is not going well. A change of this magnitude and the ripple effects it has, is not something you try to catch the tail end of a technology node with - it is simply not worth the design and tapeout work unless you are going to get some significant product volume. Also from a customer perspective high K is a major change which would require a whole new set of reliability and product certification before the likes of Dell, et al, accept it - again not something you like to do mid-technology node (unless you are talking about a new architecture)

Anonymous said...

"It's like they're trying to spin the situation any way they can to get attention off the fact"

After charges against the ATI acquisition (for integration) for the last 3-4 quarter, AMD was clearly going to get asked if there were any additional charges coming this quarter... By issuing the release (which they have to do eventually anyway from an SEC perspective), they get a bit out in front before the question is asked and now they can use the filing as a convenient shield to say we don't know the amount (they'll probably say something nicer like we can't disclose it at this time).

If they do indeed say that, the response should be - WTF?!? Do they have a finance group at AMD? This is complete BS - if they want to they should at least provide a range tomorrow. I'm going to guess and say they will indicate 'they are unable to at this time for various reasons'.

It's about 35 days until the next earnings announcement - which means they'll need to come up with a number in advance of that. If I were an investor and they don't provide at least a range tomorrow - I'd be bailing out as quick as possible as a lakc of a number or at least a range would likely mean they are probably scared how the market will react to the value.

It's a tough situation either they just don't know (which is hard to believe and a very scary proposition which you would not want investors to know) or they are afraid of the impact and trying to figure out a way to roll this out with minimal damage (a late Fri afternoon press release or something just before XMAS) or trying to figure out whether they can or should amortize it over a few quarters to diminish the impact (don't know the accounting rules on this).

It should be an interesting meeting tomorrow - I'm particularly curious to see how aggressive (angry?) the analysts get with their questions and comments. For a company in the situation AMD is in, they have gotten a relatively free ride from the analysts. I think they will (or at least should) get hammered if they don't supply specifics on asset light or this latest charge. Though it wouldn't entirely surprise me if AMD just presented fluff and did a song and dance about how they are working on it.

Anonymous said...

JJ - I would agree for the most part, but you do not see pattern effects on pure SRAM vehicles which you will see on logic. While dummification (see below) helps, you can have specific litho, etch, and strain issues on logic portions which may not have the repeatability of the SRAM structures. That said for the most part SRAM is a very good INITIAL overall vehicle to test the process.

This is true, which is why many companies actually design a test chip with both logic and SRAM, but the claim to fame is usually working SRAM and cell size (as that is an indicator of the health of the lithography and accomplished scaling), but the original question was can they jump from memory to logic... and the answer is yes, this is part of the test vehicle.

JumpingJack said...

Addition to above.. by 'claim to fame' I mean is the PR announcements of 'looky what we have'....

Jack

Giant said...

I found this, it may interest some of you:-

http://www.hexus.tv/show.php?show=195

Hexus goes into Intel's state-of-the-art 45nm FAB28 in Israel! It's only an introduction, but they state that they'll be doing some interviews and other stuff in the upcoming days.

Good stuff!

InTheKnow said...

From what you process guys have said, doing memory is a lot easier than doing logic, yes?

In some ways, this is true, but in others it isn't.

For one thing, since the memory has to hold information when the power is off, you have not one, but two gate layers to worry about.

It is also very high density similar to the cache area you are familiar with seeing on a micro-processor. Memory has more redundancy than logic, but the increased density means you still can't tolerate high particle levels.

But the real killer in memory is the margins. Since the margins are thin, yields are even more important than in logic. And thin margins usually means less manpower. The power, tools, and chems cost just as much no matter what you are making, so what does management use less of? You got it, manpower.

So you are doing similar processing with fewer engineers and techs tending the tools.

Roborat, Ph.D said...

orthogonal said: It's interesting that AMD would drop a bomb like the ATI writedown just before the Financial Analyst meeting, especially since all guidance going into this quarter was that they were going to "break even".

Just a quick comment about the write down. The real news isn't that AMD will be doing a goodwill charge. The news is that the amount is material, as in ginormous. Their previous earnings report always mentioned a goodwill charge at the end of 2007. AMD just didn't know how much.
I have always said that the value of the ATI post-buyout without the original Intel based PC business is significantly lower.

In any case, this announcement won't affect AMD's revenue and cash flow. It just affects the valuation of the company and its ability to borrow more money. Goodwill has always been the illusive and difficult part of the balance sheet.

Anonymous said...

About the memory discussion - folks are talking about 2 different things, when IBM made the announcement they were talking about SRAM, this is different from flash (NAND/NOR) memory with stored charge and 2 gates (which generally rely on tunneling for a write to store data) which I think is what intheknow is referring to.

As for the memory (SRAM) transitioning to logic this is mostly true, but even the "logic" on the SRAM test chips is not the same as a full x86 CPU...there are subtleties here and potential gotchas (especially with strain). I'm not saying it's impossible but functional SRAM doesn't translate automatically to logic from a process perspective (though it gets you a good way there). Though I believe these issues may manifest themselves more in terms of speed or power issues as opposed to working/not working issues.

Sanjay said...

Roborat,

Check out these interesting documents. It's amazing to see how AMD's trying tobe just like Intel.

desktop creative guide 2008

amdlive retail promotion guide 2008

Anonymous said...

Well looks like the votes are in on the analyst day (most of these are from links on Yahoo finance)

"Speaking at an analyst conference in New York, Chief Executive Hector Ruiz said AMD, which has been struggling to keep up with much larger rival Intel Corp., is committed to finishing the second quarter at breakeven, with a return to a profit in the third quarter."

This sounds familiar...oh yeah it sounded better when Hecotr said he expected breakeven in Q4'07... this sounds a lot likt an Shaikou Intel BK prediction.

"Many on Wall Street had hoped AMD would provide details on its "asset lite" strategy to sell off some factories and outsource manufacturing tasks to cut costs, but the company did not elaborate."

Read-still trying to figure this one out internally.

'Ruiz said the misses happened because the company became complacent in its "ability to estimate the difficulty and unpredictability of this incredible technology that we were building."'

Read - damn those shots before the meeting are really helping me now - the misses are because the product is so damn advanced! It's gold, Jerry, gold!

"A major part of AMD's plan next year is to cut capital expenditures, which AMD said will drop from $1.7 billion in 2007 to $1.1 billion in 2008."

'Asked by an analyst why AMD would not elaborate on the strategy, Ruiz responded, "I don't think it's prudent, and I think it would be absolutely silly for us to talk about something that could potentially be harmful to our plan. I don't want to do that. And I will not do that."'

Ahh the old don't want to tip our hand story...

"The company also projected gross margin of 46% to 50% in 2008"

This actually would be impressive. Though it is tempered by the fact that our illustrious blog author pointed out - AMD also predicted this in 2007!

Anonymous said...

'"What a bargain!" Ruiz exclaimed with reference to the below-$10 share price. "We must be the best buy in the industry right now."'

Goodness - is this really what you want to hear from the CEO?

'It's important for any large company to focus on the long term, but particularly so for a business that depends so heavily on multiyear design and development processes. "I don't give a damn" about short-sighted analysts and investors, says Ruiz. Those concerns can prevent some CEOs from doing what's right for their companies. "What we have done in 2007 has positioned our company for success, beyond what anybody thought possible for the future."'

Screw the stockholders! Ummm... this mutliyear design thing... was that just recently started or have you been working on it (K10) already for multiple years?

http://www.fool.com/investing/value/2007/12/13/amd-ruiz-sings-the-blues.aspx


'Advanced Micro Devices Inc (AMD.N: Quote, Profile, Research) has delayed shipment of Barcelona and Phenom chip products until the first quarter but aims to return to profit in 2008, Chief Operating Officer Dirk Meyer said on Thursday.'

'"We haven't delivered our quad-core products," on time, Meyer said at the chip maker's analyst meeting.'

Perhaps we now all can say "hard launch", ummm I mean 'hard TO launch' (damn those pesky typos)

http://www.reuters.com/article/marketsNews/idUKWEN295220071213?rpc=44

Well Robo plenty of fodder for another blog. AMD analyst day = more spin, more delays to profitability, more we can't go into detail or we'd have to kill you, more things are looking better on the horizon, an occasional *phony* falling on the sword (we screwed up K10, but it was only because it is so damn advanced and phenomenal), and of course more excuse mongering...and to come full circle the 50% margin guidance, see you again, shall we say same time, next year? (AMD's already got the materials ready)

Orthogonal said...

FTA: The number two processor maker said they expect to be break-even in Q2 2008 and will show operating profits in Q3 2008

Youch, talk about missing the boat on Q4 '07. To make it worse, they only expect operating income to produce a profit? Meaning, they still plan on seeing plenty of red ink after interest payments, one-time charges and all other misc cap-ex hit the bottom line.

Well, atleast they plan to cut R&D expenses 35% next year! O_O

Axel said...

orthogonal

Well, atleast they plan to cut R&D expenses 35% next year!

I think it was total CAPEX which will be reduced from this year's $1.7B down to $1.1B. This would include fab capacity and tooling, and therefore implies strongly that asset lite will be implemented next year. My guess on the first step in asset lite is that they will cancel plans to tool up Fab 30 with 300-mm / 45-nm in 2008; it will remain shuttered the entire year and probably well into 2009.

Also the other disturbing thing they mentioned was that 2.5 GHz K10 won't see the light of day until Q2 08. Even if the rumors of delays in Intel's Yorkfield have any substance, AMD are still screwed because all of their quad-cores for the next six months or so will still be slower than the $266 Q6600, Intel's slowest quad-core. AMD need 2.6 to 2.7 GHz to compete with Q6600.

If Yorkfield launches en masse in early Q1, it's curtains for AMD. No hope of breaking even on the operating line in Q2 like they're aiming for. The lower end Yorkfields are priced pretty aggressively, so pricing for the older Conroes and Kentsfields will necessarily waterfall down, pushing K8 into Sempron / Celeron territory.

It's clear now why AMD are relying largely on K8 for much of 2008. Intel controls the pricing due to superior performance and AMD cannot afford to sell their entire bevy of 283 mm2 quad-cores at $250 and lower. Better to sell 65-nm K8 instead since they are much cheaper to produce.

Anonymous said...

"Even if the rumors of delays in Intel's Yorkfield have any substance, AMD are still screwed because all of their quad-cores for the next six months or so will still be slower than the $266 Q6600, Intel's slowest quad-core."

It's actually worse than that - you think that thing is still going to be priced at $266 at that point? My thinking is by the time those things get to market, Intel will have lowered that pricing bar lower especially as 45nm products start hitting volume.

As I read through the commentary on the web (does anyone have a link to a transcript or presentation?) - I'm struck by the sheer state of deniability - especially the 'one' problem has been execution on K10.

Let's think about that for a second, what would have happened if K10 was executed perfectly to plan? By AMD's own words prior to the production/design slips - they admitted K10 would have minimal impact to revenue for 2007. So the losses they are seeing would still be here (possibly a bit smaller in Q4 if K10 had been sucessfully executed).

So, what's missing? The ASP's have completely eroded in 2007 and while K10 will help, it won't completely fix it. AMD's single LARGEST mistake of 2007 was not the execution on K10 but the market share at all cost strategy - they lost hundreds of millions of dollars of potential cash flow to feed 'the break the monopoly' ego of Hector Ruiz. With this money they could have tooled F36, or the F30, conversion faster (which in turn would have lowered costs quicker and helped margins) or use the money to pay down debt (which would lower interest expenses and therefor net income) or pour it into product or process development.

AMD just doesn't get it - it's the product, not the amount of market share that will make them sucessful. If they have a superior product they will gain market share (especially as they now have penetrated the large OEM's). They will not gain market share through cost cutting, because they will not be able to keep up with Intel in this area. - they simply will not be able to price their way to market (Intel has the resources to combat this and has shown they simply won't allow it)

The bottom up approach is rarely successful - this crap about we're targeting mainstream, is a euphemism for 'we can't compete on the high end'. You don't start eating at the low end and just hope /expect to grow into the higher end. It can happen on occasion (X86 really bit into the low end server market) but it is not a sustainable strategy (especially if AMD is targetting 50-55% margins long term as they claim).

AMD's strategy seems to be 'good enough' or 'enough power to do the job' - this is a commodity strategy why innovate on this XYZ widget, razor blade, coffee cup, etc...let's just focus on making it cheaper. It is amazing how this is in stark contrast to the future proofing strategy of the old you'll need 64bits eventually strategy when their products had a technical advantage. So now it's target the mainstream, who need the extra functionality or performance....

Intel's strategy has alway been increase the performance and the market will come - it's a bit risky and there will be some misses, but SW always seems to lag HW and SW will not develop capabilities in the hopes that the HW capability will come. It has always been the HW (64bit, dual core, quad core) that has led and pulled the SW...

SPARKS said...

“Speaking at an analyst conference in New York, Chief Executive Hector Ruiz said AMD, which has been struggling to keep up with much larger Intel Corp., is committed to breaking even in the second quarter and returning to profitability in the third.”

Cheese, you guys beat me to it! Wrectum is posting 4Q ’07 and 1Q ’08 as a confirmed loss! That’s a 2 quarter loss admission by a CEO!?!?! The good news is (maybe) breaking even in 2Q!

As always what is always conspicuously missing in AMD’s big plans since mid 2006 is what INTC is doing in the mean time.

Look, INTC’s upper management reminds me Great White Sharks as of late. They prowl the quiet, calm waters, stealthily and unmolested. Then at a moments notice they violently leap (Ahead?) out of the sea and rip AMD’s guts out.

Let’s take, INTC’s laptop assault at 45nM,----Bite! How many of these, LV,low power, fast things can they put on 300mm? I’m too stupid to do the math, that’s why we have In The Know. It’s a lot and it’s CHEEP, I’ll wager!

Then we have what Orthogonal called ‘modest headroom’ on Penryn, yeah right! Bite!---Penryn Xeons Clock where ever INTC needs them. Did I once say sandbagging? They did it real quiet like, didn’t they?

INTC watches AMD’s performance during 2Q ’08, then BITE!----samples of Nehalem are quietly sent out while Baloneys/Phlegms are clunking along @ 2.6.

Dual core processors sort of passé, yesterdays head lines, then ----Bite! Fast, cheep over clocking MONSTERS leap out of the water to take on the low end!

Wrectum, with his keen eye for detail, seems to think a little swim in the big pond during the next 2 quarters will be a steady backstroke affair.

Beware, Wrectum, there are SHARKS in the water and they are LOOKING for YOU!

Oh, did I mention INTC price cuts on ‘antiquated’ 65nM----------BITE!

I never bought INTC over 20. 27 is starting to look attractive.

Ya gotta love INTC when they’re at the top of their game.

SPARKS

SPARKS said...

The price of AMD acquiring ATI---- 5.4 Billion.

The loss of server market -----13%

Annual 2007 losses ----- Over 2 Billion.


Lost market capitalization----- over 5 billon


Wrectum Ruinz the highest paid Tech guy, getting a raise----- Priceless!



http://www.news.com/8300-13579_3-37-0.html?categoryId=9742077&tag=category



SPARKS

Chuckula said...

Oh.. Sparks beat me to posting the news about Hector's fat paychecks. I find it hilarious that the CEO & officers of the "monopolist" Intel aren't getting as much as Hector, while they are raking in more money in pure profits in a single quarter than AMD has netted for the life of the entire company.
There's a term in corporate law called "waste" when a deal is so stupid that no reasonable person would ever accept it. I think dumping close to $13 million on that idiot when they could pay minimum wage to some high-school kid for the same results counts as waste.

SPARKS said...

Idiot? I think the term denigrates an entire class of Developmentally Disabled individuals as a group. You see, there are many subdivisions to these handicapped people. You have your idiot’s, and then you have your high grade and low grade morons. Classification such as these are out of favor, presently, as many amongst us, may have a family member or loved one with the disability.

That said, I find it disturbing to paint the entire group with this broad brush. You do the entire class a disservice when compared to Wrectum that is, as they have an excuse for their unfortunate affliction and behavior.

He has no excuse, he was just plain stupid. After all, a high grade moron, or a low grade moron, or an idiot, for that mater, COULDN”T lose that kind of money!


SPARKS

InTheKnow said...

Elsewhere on the web, LEX said....

Lastly its interesting IBM is going gate first. The worlds leading expert told the world on Sunday that gate first can't work it simply isn't thermodynamically possible given the physics of how Metals react to HfO.

First to pick a nit. Reactions between materials is chemistry, not physics.

But that aside, I'd like to see a link to this one.

Saying that gate first is thermodynamically impossible because of the reaction of metals with HfO is painting with a very broad brush indeed. Last time I checked there were only 22 non-metals on the periodic table. And some of those are metaloids that have a number of metallic properties. That leaves you with a lot of remaining possibilities.

Not to mention that IBM has demonstrated working transistors with the gate first approach.

I'm sure the process flow is very different from Intel's flow. I'm also suspicious that making gate first work in an HVM environment is going to be more challenging than Intel's approach. But difficult and impossible according to the laws of thermodynamics aren't the same thing.

Anonymous said...

Sparks be careful of the "breaking even" quote.... remember it depends on what the definition of is, is.

Ruiz projected breakeven on operating income in Q2'08...this is different than NET income as another blogger pointed out.

After the operating income, AMD has to pay the piper for all of those ATI debts/convertible notes taken on. I would be surprise if they were truly breakeven (net income) before Q4'08.

But thankfully Hector plans to stay until then - so he can then ride out on a truly GOLDEN parachute! Think of the package he'll get if AMD got back in the black, given what he's stealing from stockholders right now in terms of 'compensation'. So much for CEO pay reform!

So, I'll ask again - what exactly is the board doing during all of this? Why does AMD even bother to put up the charade of having a board of directors?

Anonymous said...

"And some of those are metaloids that have a number of metallic properties. That leaves you with a lot of remaining possibilities."

intheknow - what is the melting point of most metals? Forget metling, how about Tg or temps where flow becomes a problem?

Given there is an RTP/spike (anneal) step which typically occurs at 900-1050C (this by the way in a gate first process occurs AFTER the high K and gate are put down), a gate first approach instantly reduces the # of potential metal solutions you can look at BEFORE YOU EVEN CONSIDER COMPATIBILITY WITH THE HIGH K FILM. Then of course you have to worry about the reactions issues mentioned (though there are potential ways around that)

I haven't seen any IBM reports on actual drive currents and Vt's. It is very easy to simply choose a midgap metal (TiN), put some Poly Si on top of it and demonstrate a working transistor - of course this transistor would have extremely good leakage performance, but terrible drive current (Idsat) performance without a band edge material. IBM's announcements in the past with regard to applicability to high volume are dubious - I'm not saying they are lying, but it is easy to have a working solution in the window IBM is claiming that will not be good enough for a performance related logic process.

If you go by working transistors - I believe Intel had working transistors as early as ~2000 or 2001, of course these were nowhere near the performance targets required and were useless for a high performance CMOS device. "Working transistors" is a meaningless claim without the supporting transistor data - it is also meaningless if it is not both NMOS and PMOS data. Again, I'm not saying IBM doesnot have this data, but without it folks are just taking things "on faith". When Intel announced they had a fully functional process flow that they were ramping and also presented followup drive current and other key parametrics to the scientific community.

Orthogonal said...

be careful of the "breaking even" quote.... remember it depends on what the definition of is, is.

Thanks for bringing this up again, it seems to get lost in the shuffle, today has certainly been a busy day on message boards.

And then we get this gem from Hector
"'"What a bargain!" Ruiz exclaimed with reference to the below-$10 share price. "We must be the best buy in the industry right now."'

and

"How in the hell can anyone conclude that our company is worth 40 per cent less today than it was a few weeks ago?" he asked.

Well, considering that AMD's current book value is 4.1B and a large impairment charge looming to take it down only God knows how much, coupled with 4Q's of consecutive half-billion losses with no sign of Net Profits for the next 4 to 5 quarters, I'm amazed the stock isn't below $3 now.

GURU said:
Given there is an RTP/spike (anneal) step which typically occurs at 900-1050C (this by the way in a gate first process occurs AFTER the high K and gate are put down), a gate first approach instantly reduces the # of potential metal solutions you can look at BEFORE YOU EVEN CONSIDER COMPATIBILITY WITH THE HIGH K FILM. Then of course you have to worry about the reactions issues mentioned (though there are potential ways around that)

Excellent point, I was waiting for someone to bring this up. Most people neglect to take into consideration the Anneal steps and how they GREATLY effect the number of material combinations that are feasible in a gate-first process flow. Avoiding some of these conflicts is the main reason why Intel pursued the gate-last methodolgy. It obviously presented other complex problems to solve, but once they had laid their bed, there was no going back and execution was key to get the integration and manufacturability sustainable in an HVM environment and released on-time.

AMDSuicideWatch said...

Arabian Micro Devices, I mean, Another Months Delay, err... Anihilito Mucho Deniro, sigh:
There's no truth to the rumor that Hector Ruiz and co. are intentionally crashing AMD stock in an attempt to load up on sub-$10 stock options and then get AMD bagholder's to pump the stock to load his personal coffers. How else could you explain the absolutely stupifying behavior.

How did this HBO special on Katie Morgan get on here, this DVR thing must be broken:
If only time-shifting were possible in the hardware/manufacturing world. It wasn't long ago that AMD was taking out full page ad's in the Wall Street journal challenging Intel to a street fight in a no-holds-barred fight to the death on Server workloads, but now the PR machine is pushing "price/performance", "power savings" and "mainstream market", oh how the mighty have fallen.

"Did you say niblets?","No, I said nibléts":
In a never ending cat and mouse game, AMD continues to think people believe them when the next stepping is going to cure all the K10 woes. First it was BA, then it was B2, now we wait for B3. When are they going to admit that their 65nm is a dog and holding them back. Only Sharikou is sticking by them in these rough times.

I personally believe that U.S. Americans have difficulty finding the U.S. on a map because some people in this country don't have maps:
On the plus side, atleast the ATI business is finally pulling it's weight and putting out decent products, we haven't seen this type of competition in the sub $250 range in years, but apparantly it's still not good enough to keep them from being the scapegoat in a large goodwill impairment charge as a result of an ill-timed acquisition.

You just gotta ask yourself one question. Do you feel lucky? Well, do you? PUNK!!!:
Current odds on future Barcelona shipping Bins.

2.5 Ghz by the end of Q1 '08: 2:1
3.0 Ghz by the end of Q2 '08: 100:1
3.0 Ghz ever on the 65nm Process: 10:1

SPARKS said...

“Sparks be careful of the "breaking even" quote.... remember it depends on what the definition of is, is.”

Tell ya what, I couldn’t anneal a piece of copper with a hammer, but I know what a B.J. is and I certainly know when someone is blowing smoke up my ass. Today’s anal-ist meeting was a beaut’!


Well, that’s it, in a nut, isn’t it? The whole friggin Anal-ist meeting/review was the day AMD was supposed to come clean and admit to failures we all have been revealing, categorizing, analyzing, and dissecting for six months (my tenure here). Upon reading the posts above, including the excellent hi-k (whew!) analysis, what are we left with?

Ironically, more bullshit spin, that’s what. This whole meeting was MAJOR damage control. More pathetically, I might add, is Wrectors “bargain” comment. They’ve done and said almost anything and everything to everyone during the past year to over inflate and prop up this failing slob of a company.

Wrectum gets 13.1 million to stand on a soapbox like some cheap gypsy snake oil salesman, pump up his 1 year catastrophic disaster, while trying desperately not to have the bottom drop out.

You can ditch the glitch, but you’re still left with the same dog you started with. They know this and they know it BIG. One can only guess what their real plans and intentions are. Whatever it is, it ain’t good, because the eleventh hour miracle ain’t gonna happen. Obviously, they know this, too.

Anyone who invested in AMD during the upside 2006 and bailed made a killing on the downside. The rest of the suckers who stayed on are just left holding the bag. They milked this cow for what ever it was worth, especially the original ATI investors, now it will die a slow death.

So much for The INQ’s big surprise, it was just another horse and pony show.

SPARKS

Anonymous said...

Call me a geek but this is pretty damn funny....

http://www.eetimes.com/news/semi/showArticle.jhtml;jsessionid=KWJXG25FIUA34QSNDLPSKHSCJUNN2JVN?articleID=204802505

InTheKnow said...

intheknow - what is the melting point of most metals? Forget metling, how about Tg or temps where flow becomes a problem?

Higher than most people think. Here is a short list of metals with high melting points.

Beryllium - 1278C
Chromium - 1857C
Cobalt - 1495C
Hafnium - 2227C
Iridium - 2410C
Molybdenum - 2617C
Nickel - 1453C
Palladium - 1554C
Tantalum - 2996C
Titanium - 1660C
Tungsten - 3410C

That's roughly half the list. If you throw out the metals with melting points below 1500C as likely to soften during an anneal (yes, it's a crude approximation) you only dump 3 from the list above.

So the high temp anneal isn't really a show stopper. I've just given 8 options and there are probably another 5-6 you can add to the list. You can rule out alloys as they have lower MPs than the pure metals, but you can throw in oxides of all those metals and you are now in the realm of ceramics (which HfO just happens to be) that have obscene melting points.

Yes, I know there are electrical, physical and processing concerns to be addressed. I'm not trying to minimize those. When all is said and done, you only end up with a handful of options. I'm only saying that Hf and whatever the mystery metals are aren't the only options. Though when all properties are considered Hf may be the best choice.

I'll offer this tidbit from Sematech back in January in support of my contention that you can do gate first.

The relevant point being:
These CMOS devices were fabricated with conventional gate-first, high‑temperature processing flows practiced in the industry today, with no reduction to drive currents or other performance metrics. In addition, this good performance was demonstrated without using substrate counter-doping or other extraordinary or complicated measures.

I'm not even of the opinion that gate first is best. I'm only saying that to claim it isn't a viable alternative without a lot more data than I've been able to find is a bit short sighted.

And my real gripe is with the "thermodynamically impossible" part of the statement. Quite simply, I don't believe that the laws of thermodynamics preclude gate first manufacturing.

InTheKnow said...

And this is classic IBM on gate-first vs. gate-last.

It would be easier on the hafnium material to switch the order in which the gate is laid down, for what's called a "gate-last" process. But doing that would mean changing semiconductors' basic designs and retooling factories to match, a process which Dr. Patton says would be costlier in the end.

"In the gate-last approach, because of the unique features you're trying to achieve...you can imagine you've got some polishing and CMP [chemical mechanical polishing] processes involved, and that ends up introducing some ground-rule restrictions," he went on. "But it's an easier approach because you put the high-k material very late in the process, so it doesn't put as much stress on the high-k material.

"So if you're trying to find the easiest approach to get high-k in, it's with a gate-last approach," the IBM lead engineer continued. "But as a result of some material innovations that we've been able to make, we can put the high-k gate material down in place of the gate oxide, and it can go through the thermal cycles and still have the right properties that we need in terms of interface property and threshold or turn-on voltages."


Easy isn't as important to IBM as finding the "elegant" solution. In this case one that keeps the same basic process flow. By taking the "easier" path, Intel is first to market by 1-2 years and will likely have a more robust process.

So, for the record, I think Intel made the right choice. But gate-first is doable. I just don't want to be the poor sap responsible for keeping key parts of that process on target.

Anonymous said...

"So the high temp anneal isn't really a show stopper. I've just given 8 options and there are probably another 5-6 you can add to the list."

I'm going to put this bluntly - you are out of your league here.

For any of the metals to work, they need to be band edge matched to the conduction and valence band of Si, which implies a very specific work function for the pmos metal and the nmos metal (and this work function value is in turn dependent on the high K chosen) You providing 8 choices wouldn't is a meaningless point that lacks context - are any of these even close to the right workfunction? These also would not react with a high K oxide, especially a Hf based one which tends to act as a "catalyst" (not in the true chemistry sense) in many cases?

Then let's talk about how you are going to deposit them - are you going to sputter these metals (which can potentially damage the high gate oxide or lead to gate oxide charging effects).

The anneal temp is a HUGE DEAL! It doesn't make it impossible but it severely limits material choices, which in turn can constrain deposition choices and in an extreme case limit the high K choice. The gate first process also impacts etch and patterning and a variety of other things.

BTW Sematech is useless on this topic - I've attended many presentations on this specific topic and their data always has holes in it. They spent years working on one MOS only process, unable to get a CMOS process working. The EOT's they were initially targeting were around where people were targeting conventional SiON on the 90nm and 65nm nodes. They may have gotten a bit better lately but I tend not to trust too much coming out of sematech in this area...

I didn't say you can't do gate first but it is difficult and the anneal narrows down your metal choices instantly...and something else to chew on...

What happens when you need to move to a new high K oxide in 2 generations which will potentially require a whole new metallization choice...do you just hope that there are still high temp metals systems available that match the new high K or do you tune your high K choice to metals that are compatible with gate first processing?

Gate last/replacement process has its own challenges which may also have showstoppers int the future (fill is one key challenge going forward), but a key advantage is that there is very minimal thermal limitations on material choices.

Finally, please point to where I said you CAN'T do gate first...please re-read my post and stop creatively interperting it...

My apologies for the rant.

Anonymous said...

'In the gate-last approach, because of the unique features you're trying to achieve...you can imagine you've got some polishing and CMP [chemical mechanical polishing] processes involved, and that ends up introducing some ground-rule restrictions," he went on...'

This is BS and spin by IBM...the metal gate that sets the electrical properties is very thin and then followed up by a conventional fill metal which is easily polishable... he makes it sound like this is a big deal... what's sad is he appears to have the background and likely know this but is misleading folks. I'd be curious to understand the ground rule restrictions that are introduced.

I would also like to compare that to the the "ground rule restrictions" imposed by the gate first process on the metal choice. It's unfortunate that a technologist is preying on the lack of knowledge in this area.

I'd also like the to better understand the polishing AND CMP
(CMP being polish!) - he makes it sound like 2 separate things...

I'd be interested in hearing his thoughts on what happens when they scale the high K oxide in the future and how it holds up to blocking implant penetration into the channel (this is/was a big deal as the SiO2 was scaled thinner). Of course with the replacement process you can grow the SiO2 thicker then normal as you end up etching it out anyway...

But hey, the guy really seems to know what he is talking about and clearly does not have a bias. :)

I also find it amusing that IBM the champion of SOI (which adds ~5-10% to finished wafer cost) is now talking about cost, but fails to provide even an inkling of what the added cost of the replacement process is vs the gate first process. I'd also be curious to understand the "retooling" needed!

SPARKS said...

For any of the metals to work, they need to be band edge matched to the conduction and valence band of Si, which implies a very specific work function for the pmos metal and the nmos metal (and this work function value is in turn dependent on the high K chosen) You providing 8 choices wouldn't is a meaningless point that lacks context - are any of these even close to the right workfunction? These also would not react with a high K oxide, especially a Hf based one which tends to act as a "catalyst" (not in the true chemistry sense) in many cases?


GURU, sometimes you get down right scary. I'm taking this one on my morning commute, (for the next week)!


SPARKS

Tonus said...

"It's actually worse than that - you think that thing is still going to be priced at $266 at that point? My thinking is by the time those things get to market, Intel will have lowered that pricing bar lower especially as 45nm products start hitting volume."

Well, if AMD is slow in producing competing products in volume, would Intel really continue to drop prices if they do not have to? I am figuring that they will roll out their faster CPUs more slowly until AMD is able to catch up and/or compete on performance.

Or at least that is my view. Does anyone think that Intel will push 45nm and/or quad-core harder if it seems that AMD isn't able to produce their own quads at increased speeds and higher volumes?

InTheKnow said...

I'm going to put this bluntly - you are out of your league here.

Actually, I don't think so. I did learn something during the 9 years I spent doing material science research. Which is why I said...

"Yes, I know there are electrical, physical and processing concerns to be addressed. I'm not trying to minimize those. When all is said and done, you only end up with a handful of options."

...in my original post.

I was replying to the statement that implied that there were few metals with appropriate melting point properties.

My intention was not to demonstrate which metals were the right choice. But to respond to a statement made earlier that seemed to imply the high temp anneal was a show stopper in and of itself. As you've pointed out there are many issues that need to be considered.

There is no need to try and read more into my statement than this, there are a number of metals that satisfy the high temperature anneal criterion.

InTheKnow said...

To the anonymous poster with whom I've been "discussing" high-k metal gate.

In retrospect, I think we are actually on the same page.

The only reason I brought the whole thing up was in reference to a statement made by Lex elsewhere on the web that an "expert" (presumably with Intel) claimed that gate first was "thermodynamically impossible."

This statement struck me as sufficiently outlandish that I felt a need to respond. There are many challenges that make gate-first difficult, but the laws of thermodynamics do not indicate it is impossible.

As I've tried to indicate in all my posts. I believe Intel made the better choice by going gate-last for a number of reasons.

I'm always skeptical of IBMs breakthroughs since they tend to be more academic in nature. They often don't turn out to be very applicable in real world manufacturing.

I was unaware of SEMATECH's history as I've had very few dealings with them. Thanks for the background. I'll treat their material with more skepticism in the future.

And you are correct. I did focus in on the early part of you post and gloss over the rest. I'll try to do a better job of taking the whole thing in context in the future. My apologies.

Anonymous said...

Johan of Anandtech says...


Considering that


Intel will finally produce Itaniums with the very latest process technology
IBM can not deliver the fastest Power6 in high quantities
AMD doesn't seem to be able to come up with a more aggressive design than the K7 tuned and tweaked
and that Nehalem has the potential to make them all look look as overpriced boutique CPUs




I would say 2009 could be the year that Intel dominates the CPU world.

InTheKnow said...

Sparks, I'll take a stab at this one, with one caveat. I'm grossly oversimplifying this, but hope to capture the essentials.

Guru said... For any of the metals to work, they need to be band edge matched to the conduction and valence band of Si, which implies a very specific work function for the pmos metal and the nmos metal (and this work function value is in turn dependent on the high K chosen)

The energy states electrons can occupy are specific to a given material. So what Guru is saying is that you have to pick metals that have electrons with energy states that match the energy state of the semiconductor.

This is different for n-mos and p-mos because you have implanted different materials in the two regions which results in different available electron energy states for the two regions. So you need a different metal for each region in order to match the energy states of the electrons.

The choice of high k material influences this because it will affect the apparent charge seen by the metal and the semi-conductor.

In addition, the high k material must not react with the metal you have chosen since this reaction would change the possible electron energy states of both the metal and the high k material (not to mention effectively making your high k gate thinner) and cause the whole system to break down.

I'll leave it to Guru to correct this if I've mis-stated the case or left anything critical out of my explanation.

Tonus said...

Skulltrail @ 4.8GHz

Or so the poster claims. Looks as if the CPU-Z program is incorrectly ID'ing Harpertown as Yorkfield. Which means that the other data might be off.

Still, if it's legit that is impressive. Apparently the score in the rendering benchmark is far and away better than any current desktop chip.

Anonymous said...

"I believe Intel made the better choice by going gate-last for a number of reasons."

At first glance I tend to agree though honestly this will be difficult to assess for some time for several reasons:

1) IBM's data on their process is not available (as far as I know), so it is difficult to assess relative performance.

2) IBM doesn't ramp at the rate as Intel does so it is difficult to assess how HVM worthy the gate-first process is. If Intel is having difficulty on their process it will be rather easily seen in 2008 via volumes and/or bins of the 45nm chips - given projections it appears as though they are not having any major issues. With IBM and AMD, it may not be so easy to see production issues - between things like TLB bugs, "choosing" to focus on mainstream parts, and getting all excited about shipping hundred's of thousands of parts - it will be nearly impossible to judge how well the ramp is going for them when they finally get around to implementing high K. If they also do this late 45nm insertionon one of thge CTI step, that will further obfuscate the data on how well things are ramping.

3) There are other considerations (esp from the Intel side) beyond 45nm. Intel tends to select materials and integration schemes with extendability in mind. When the time comes to move to a higher K, Intel may simply have to just change precursors - IBM may have to change their entire front end integration. It is also not clear how scalable the IBM oxide is with the "stuff" they have to do to it to make it anneal compatible. I'm sure they've looked ahead to at least 32nm, but if they are doping it, the more you dope it, potentially the more difficult it will be to scale it. (Though from a material science perspective as you thin the film it becomes less susceptible to re-crystallization)

4) IBM's cost claims are unsubstantiated. Replacement flow is more expensive per wafer, but it is difficult to say whether this is substantial (actual it is not difficult to say, but it is not public info).

The main issue with the replacement flow will be the ability to fill the features (gates) as they continue to scale. This is essentially the traded off with the concerns of exposure of BOTH the high K and Metal gate to anneal temps. IBM bringing up CMP is a joke - this is a metal polish - metal polish has been around forever (IBM should know better as they were one of the early pioneers of CMP)

Much like MCM vs native quad - it is not about which is more elegant, it is about time to market, performance, and to a lesser extent cost. IBM can play the AMD, "more elegant", "more difficult" - but if Intel's performance is there (which based on power consumption it is), I really don't care if they are stuffing peanut butter in there! They've brought product to market YEARS before the "harder" solution (I'm going by late 2009 as best case for the AMD version of the IBM solution).

So while IBM may tout their brekathroughs...Intel is shipping and collecting revenue on theirs. As intheknow mentioned IBM likes the scientific announcements (google SiLK), Intel tends to focus more heavily on the manufacturing aspects.

Anonymous said...

"Well, if AMD is slow in producing competing products in volume, would Intel really continue to drop prices if they do not have to? I am figuring that they will roll out their faster CPUs more slowly until AMD is able to catch up and/or compete on performance."

This is the popular theory and the "we need competition" at all cost argument. And while price drops may slow and you can argue the speed of innovation / or the speed of new product introductions may slow down without competition, may I present a counterargument?

How exactly does someone with dominant market share grow revenue and profits?

There are 3 ways - cut costs, increase prices, increase volume. Costs? Intel will work on cost regardless - this will drive the bottom line with or without competition. Let's put price aside for a second...

How does Intel grow volume? There is only so much AMD market share Intel can eat into. The only significant way for Intel to grow the volume is for them to grow the overall x86 market - this has always been their approach (with the exception of recent times where they've focused on taking back AMD market share gains). Can Intel really grow the market volume if they significantly increase prices or if they do not increase the performance of the chips?

Sure, the pace of price cuts and innovation may not be as quick without someone chasing right on your tail, but that doesn't mean it will stop. I think Intel will continue to price the low end quads aggressively as this will increase market acceptance of it. This has strategic value for Intel, in addition to the higher price of quads, it makes the barrier for competitors that much higher.

So I think you will see Intel continue to be aggressive on the low end quads and price increases/slower rate of price cuts will be on the high end (like we are already starting to see). I have no problems with that as the people who are buying the top bin or two know what they are getting into and if they want the better product, they need to pay the higher price - it's not like the top bin quads are going into the computers the average budget conscious consumer buys.

InTheKnow said...

How exactly does someone with dominant market share grow revenue and profits?

There are 3 ways - cut costs, increase prices, increase volume.


Might I respectfully suggest a 4th option? Move into or create new markets. This is what I think Intel is trying to do with Silverthorne and later Moorestown processors.

With the announcement by Everex that they will be fielding a competitor to the Eee PC (using a Via chip), it seems that there might be some momentum building behind in this space.

If trying to move into a new market or create a new market doesn't drive innovation, I don't know what does.

Anonymous said...

Hmmmm... didn't see this in the mainstream coverage of the meeting:

http://www.x86watch.com/

'Rivas also seemed to imply that ramping production of quad-core processors was not a given. "Our No.1 goal is to get to ramp as soon as possible." Which of course means anything could happen. Rivas did say that "hundreds of thousands" of quad-core processors will ship in Q4 and "that would definitely have an increment that is at least 2X in Q1."'

So they will go from conversion rate of 1-2% to 3-4%? I'm sure he is being conservative given the recent missteps...but 2X? At the beginning of a ramp, one should be able to convert at least 1% of production/quarter - especially if there is 'strong demand' as AMD claims. For AMD's sake I hope he is being ultra-conservative.

So from launch in Sept to likely less than 5% conversion by end of Q1... so much for AMD's agility and production capabilities.

Anonymous said...

And in "AMD Addresses Problems, Talks Roadmaps" article.

http://www.x86watch.com/

"2.5 GHz won't be achieved until early Q2, April-May timeframe."

This to me reads like some sort of paper launch or the now standard 'product shipping' AMD claim in Apr, with actual product for purchase in May-ish. Why must AMD play the parsing words game? What does achieved mean? Internal? Actual product for purchase? Why must everything be smoke and mirrors? Can they not speak plainly?

'CEO Hector Ruiz talked about the potential of increasing manufacturing at partner Chartered Semiconductor to free up more quad-core production at Dresden: "At some point in the future we could make the decision to significantly increase our capability if we so choose to."'

Hmmm..strong demand for the product, yet they haven't shifted more work to Chartered. The selling every chip claim from some of the fans is ringing a bit hollow - given AMD's situation if they were selling every chip and still had strong demand, on would think they'd be outsourcing as much as they could to Chartered, no?

Anonymous said...

This was buggung the hell out of me, but noone else seemed to care:

'The AMD executive, Mario Rivas, was reported to have said that Phenom processors "account" for the performance degradation that occurs when the BIOS fix is implemented. The implication being that processors actually run faster than the rated speeds to compensate for the performance hit.'

The above is what I was thinking...

'The statement in question was: "processors are listed at clock speeds that account for the degradation [estimated at 5 to 20 percent] from the BIOS fix." AMD is now saying this is inaccurate. "There was a disconnect in the interview. That statement is not accurate. All Phenoms are being shipped with the BIOS fix...but they're still rated for that particular clock speed that they're running at."

A 'disconnect'...gotta love it...talk about job security - I'm going to apply for a job at AMD's PR group. You'd think executives would know better (or know not to comment on this stuff). The original statement in the CRN interview was updated - so you the evidence trail on the 'disconnect' is rapidly vanishing.

Source - also from x86 watch (which has the original Rivas quote)

Anonymous said...

And finally (also from X86 watch):

'In related news, a Dell server representative said Monday that as soon as AMD comes out with the quad-core "Barcelona" Opteron they will have systems but "it keeps getting pushed back." (12/10/07)'

This must have brought a smile across an Intel face or two, as they redirect more of their top end chips to HP, Apple, et.al.

Dell must now be wondering how 'great' it was to have a second source - let's see:
- loss of Intel discount.....check (though in fairness they would have likely lost this anyway when AMD filed their lawsuit)
- second source with inconsistent product delivery and timeline to allow for streamline planning and maintaining low inventories (something Dell's whole business strategy relies on)....check
- lower OEM priority to Intel's products...check

I wonder how Dell feels about the AMD move in hindsight. They sure did teach Intel a lesson. Some times the threat of action is better than taking the action - because once you take the action, the threat no longer exists.

If I were Intel and wasn't worried about government action, I'd tell Dell here are some Celerons, we'll get you the other chips when we get to it - it's hard to say when as we are having production problems in supplying our other OEMs, who seem to be growing rather fast, in the meantime please feel free to puchase as much as you want from your second source.

Anonymous said...

I lied....last one....see x86 watch article on Silverthorne.

'Krzanich also made it clear that Intel's manufacturing philosophy differs from AMD's. (Though there was no specific reference to AMD.) He said Intel always makes sure it is ready to do a launch "in a reputable way...We don't launch without a production-worthy volume."'

Not quite as good as the 'we see a distinct advantage to having all of our cores working' but still a pretty good barb.

Anonymous said...

Lost in all the chatter of the analyst day meeting, was that it was canceled last month on short notice - The supposed reason this was done was to enable AMD to give analysts a better and more comprehensive view of future roadmaps. How'd that work out?

If I can postulate an OBVIOUS lternative - K10 was floundering and they were scrambling to come up with a roadmap as the original analyst meeting was coming around. They hoped a month would allow them to get a handle on it, and while it helped they still did not have a clear and detailed plan. Of course they realized they could not cancel a 2nd time so they used the time to develop the spin.

And folks wonder why analysts are starting to bash and 'turn' on AMD. Perhaps they have turned from the loveable underdog to a company that deceives and misdirects when it is convenient or necessary to do so:

- We'll disclose details on asset light at a future time (this was H1'07).
- We expect to ramp the clocks quickly in Q4
- The bug is dependent on clockspeed and impacts 2.4+ GHz
- We've adjusted clockspeeds to account for the TLB bug fix...well, technically that was inaccurate, oh wait that was a 'disconnect'
- we canceled the meeting so we can provide greater detail in a month.
- Oh by the way the demos you are doing are on parts not available at launch (Tahoe)
- 40% better across a wide variety of workloads...
- H1'08 45nm ramping (though please accidently confuse this with product available in H1)
- Operating margin to be positive in Q3 - please confuse this with profitability to make things look good for us.
- We only do hard launches
- 65nm manufacturing as expected and experiencing 'strong demand' for Phenom (well I guess when you can only produce 1-2% on K10, that could artificially create strong demand)
- We are leaving open the option for high K on 45nm

The recent 'turn' on AMD, IMHO, has as much, if not more, to do with what they are saying and spinning as the lack of execution. Most of the EXACT quotes are not out and out lies, as AMD has parsed their words very carefully (like a good politician or lawyer) - they have become reliant on the press mistakenly twisting it and then they have deniability. Q3 next year they'll be saying we said operating income not profitability, you interpreted it wrong - of course, lost in all of this will be that the answer was in response to when will you return to profitability?

Khorgano said...

Q3 next year they'll be saying we said operating income not profitability, you interpreted it wrong - of course, lost in all of this will be that the answer was in response to when will you return to profitability?

Not to mention the fact that they are applying their gov't subsidies from Germany as a credit to their costs of operation and essentially counting grants as operating income. Don't believe me? They explicitly state it in their 10-Q filings to the SEC.

http://www.sec.gov/Archives/edgar/data/2488/000119312507238299/d10q.htm
Page 31:

We record grants and allowances that we receive from the State of Saxony and the Federal Republic of Germany for Fab 30 or Fab 36 as long-term liabilities on our financial statements. We amortize these amounts as they are earned as a reduction to operating expenses. We record the amortization of the production related grants and allowances as a credit to cost of sales. The credit to cost of sales totaled $34 million in the third quarter of 2007, $34 million in the second quarter of 2007 and $30 million in the third quarter of 2006. The credit to cost of sales totaled $101 million in the first nine months of 2007 and $84 million in the first nine months of 2006. The fluctuations in the recognition of these credits have not significantly impacted our gross margins.

So far they've applied $101 Million of gov't subsidies to their operating expenses and effectively increasing their EPS by 0.18 this year. It'll likely increase next quarter.

So, if AMD is claiming "operating profit" by Q3 next year, lets all be sure and take into account this "adjustment" to see if it still stands.

SPARKS said...

GURU, I’ve read your posts; I’ve copied them for my morning commute. My apprentice picked them up over coffee Friday, shook his head and asked me “Do you understand any of this stuff?’. My response was, with a sigh, “I’m trying”.

Ok, please don’t beat the shit out of me if I get this wrong.

Hafnium is a very reactive metal. And I’m certain, obviously, INTC kicked in an alloy derivative to stabilize it. Then, they found a way of sticking to the substrate (ALD/ALE?) without cooking up everything it comes in contact with? (Am, I close here?)

Now, it seems the magic which INTC has mastered is not destroying the deposition with high temperatures during subsequent annealing steps in the process. (Christ, I got that out in one sentence!)

Ok, if I’m not even close, but if I’m on the right track (my morning commute), why is it no one, not even the arrogant, pompous, stuffed shirts at IBM couldn’t pull this one off. Further, is the temperature variable so sensitive that a variation in a few degrees C could be a make or break scenario? In other words, let’s say IBM got the whole enchilada right but they were off by a few degrees, give or take, during just one phase, could this mean the difference between success and failure for the entire process on the whole.

Does, in fact, INTC truly have a monopoly on the successful implementation of hi-K? Is there only one way to do this successfully? Will other companies need to license INTC, obviously, proprietary process?

SPARKS

InTheKnow said...

Sparks said ...

Now, it seems the magic which INTC has mastered is not destroying the deposition with high temperatures during subsequent annealing steps in the process.

I won't try to speak to specific details of Intel's process. I don't know what they are.

But I can speak to this item. Intel has avoided the whole anneal issue by not depositing the gate oxide (HfO) and associated metals until after the anneal process. They fill the space that those parts of the transistor will occupy with another material. That material occupies the space through the high temp anneal processes. The filler material is removed somewhere in the process flow after the anneal is completed. So you never have to deal with the temperature effects. Using this approach requires Intel to change the sequence of the processing steps when compared to the SiO gate that has been used for 40 years.

IBM is pushing the idea that it is better to maintain the processing sequence. They keep the same steps in the same sequence and just substitute the new processes for gate and metal into the old process sequence. On the surface this seems like the preferred thing to do. It is only when you start digging into the details like Guru has done that you begin to see the issues.

SPARKS said...

“IBM is pushing the idea that it is better to maintain the processing sequence.”

In The Know, so what is implied here that INTC does, indeed, have a proprietary process which would need to be licensed. If not IBM wouldn’t be pushing theirs, perhaps? INTC’s successful 45nM hi-k presently in HV production would dictate that INTC built a better mousetrap that IBM can only pump, spin and dream about.

“The filler material is removed somewhere in the process flow after the anneal is completed. So you never have to deal with the temperature effects.”


Ok, you can do this once, no problem. However, I always thought that a finished die was a multi level affair. If so, how do you get around this temperature thing by not destroying the previous layers work (finished), with subsequent layers and annealing steps? Or is there only one layer of active regions on a finished wafer, die or whatever? This is where I am confused.

Is INTC’s process patented or can the “Imitator” give a new meaning to “copy exactly”? If this is so, then AMD could get back in the race. Then $8.42 could, therefore, be a “bargain”.

SPARKS

InTheKnow said...

In The Know, so what is implied here that INTC does, indeed, have a proprietary process which would need to be licensed.

I don't know how much of Intel's process is protected by patents and how much is a trade secret. You can be sure that any patent that does exist is incomplete and you won't be able to completely reproduce the whole process by trying to infringe on the patent.

I can't see Intel licensing this technology. They view their process as a competitive advantage. The more people that know how to do something the less secure the secret is. I just don't see Intel doing anything to risk losing a competitive advantage.

Ok, you can do this once, no problem. However, I always thought that a finished die was a multi level affair. If so, how do you get around this temperature thing by not destroying the previous layers work (finished), with subsequent layers and annealing steps? Or is there only one layer of active regions on a finished wafer, die or whatever? This is where I am confused.

Again, I don't know the process details.

It may be that there aren't any additional layers deposited after the filler is put in place and the anneal occurs.

If there are additional depositions, in a general sense you can put material down and then cover it with a mask. You then etch away everything that isn't covered by the mask. So you would leave the areas over the filler unmasked and let the etch expose the filler material.

This would mean you would have to choose a fill that wasn't sensitive to the etch you are using, or very carefully time the endpoint of your etch so that the etch stops before you etch out the filler.

Hopefully the explanation is clear. This is a lot easier to explain if you can draw pictures. I'll have to hunt around on the web and see if I can find a graphical example.

InTheKnow said...

Sparks, go here. You will see link for a section called Semiconductor manufacturing techniques. Click on this and scroll down a ways and you will see three sequences of shots showing how the etch and mask sequence works. The last one is the most relevant to what I'm trying to explain. In theory, you can repeat the procedure as many times as you need to.

Incidentally, if you want to try and go into more detail on the whole band gap matching thing, there is a link to a section called Band theory of solids. It is far more accurate (and more detailed) than the explanation I gave you.

In fact, the page has a truckload of detailed information on a number of topics useful for understanding semiconductor manufacturing, including quantum mechanics.

Just keep in mind while reading that section that I've seen a quote attributed to various leading research scientist in the field of quantum mechanics (including possibly Einstein) that says "I have seen the truth and it makes no sense." :)

jumpingjack said...

"Hafnium is a very reactive metal. And I’m certain, obviously, INTC kicked in an alloy derivative to stabilize it. Then, they found a way of sticking to the substrate (ALD/ALE?) without cooking up everything it comes in contact with? (Am, I close here?)"

Sparks,

Yes, Hf is a reactive metal, but the press often misuses the context of Hf in this technology. It is not Hf that makes the metal of the metal gate, but it is a HfO2 (hafnium oxide) that makes the gate oxide material, replacing silicon oxide. Intel (nor IBM for that matter) has disclosed the details of the metals they use for their electrodes (replacing the poly silicon), which is as critical to choose as the new gate oxide material... why? Because you need different kinds of metals for pMOS and nMOS based on their workfunctions.

The HfO2 studies in the literature though do show various types of doping or trinary compounds for this materail as well, such as HfON (a Hf oxy-nitride) or even a silicated HfO2 based dielectric, there are several variants, which one Intel and IBM are using is also not fully disclosed so we don't really know.

What we do know is that both Intel and IBM have chosen different approaches to putting that gate material in, and frankly I am fuzzy on what it all entails though I understand why they do it... IBM touts gate-first, which basically means that during the processing, the step where SiO2 gates are formed is simply replaced with the high-K step... in the other method, gate-last.. the gate high-K is placed into the device at a different step location in the processing.

Intel has claimed (I think I read it at semiconductor international's site) that the gate first resulted in an inoperable pMOS but I could be wrong.

jack

Anonymous said...

Ok couple of things for those interested:

Replacement gate - conventional flow with traditional SiO2 and poly Si gate all the way through the first ILD... the poly Si gate is then exposed and etched out as well as the SiO2, exposing the channel Si... put in your high K then put in your nmos and pmos metals (some masking is needed) and then fill the remainder with a conductive metal, which you will need to polish - then rest of flow is conventional again.

As you can see there are a few more steps and you have to deal with getting the metal into the etched out gates (traditionally one of the smallest features on the chip and smaller than the tech node name istself, '45nm node' = ~30-35nm gates). ALD is a remarkable process for this so the gate oxide and the metals (if Intel is using ALD for these?) are easy - filling the remainder in is less easy and is probably the most difficult part of the flow (once the material system was figured out). So once you are done with these steps the only temperatures the gate oxide and gate metal see are the "backend" temperatures which are fairly low and compatible with most any material you could choose.

A gate first process is "simpler" from a process flow perspective as it is remarkably similar to the conventional SiO2 gate process - the only major difference being an additional mask step to put down an nmos metal vs a pmos metal (or a mask to do an implant or nitridation or whatever IBM is doing to make the n metal different from the p). There also may be some subtle etch differences, but these are not likely big deals. The gate first flow should be cheaper (fewer additional steps) and the major constraint is the temperature budget imposed as we have beat to death by now.

I would imaging in the case of both Intel and IBM/AMD most of the "tricks" are kept trade secret as both companies are very heavily cross licensed and therefore the process would be open to anyone with a cross license in the Si process area. Also with patents - the patent application (prior to final decision on whether it will be approved) is visible, so people can get started on reverse engineering it before it even gets patented! As a result patents these days are more defensive in nature (to prevent someone else from locking you out) and more of the sensitive stuff is being kept trade secret. I would imagine virtually all of the integration details are trade secret - if you read some of the patent filings they are generally very broad (with desciptions like 'rare earth oxides' instead of a specific material). Stuff that is easily reverse engineered (for example by cross sectioning or material analysis) is often patented as people will find out anyway - the 'subtle' stuff that will be difficult to reverse engineer is often not patented for that very reason.

And for those who are interested in more gory details - one of the issues with HfO2 is achieving true stoichometry (generally speaking the 'O2' in HfO2 is less than 2 which means it is slightly oxygen deficient). There are lots of models on potential issues this can cause but basically you have some unsatisfied bonds that will want to be satisfied somehow...

I would suspect (pure speculation on my part) that exposing the film to a high temp anneal could cause all sorts of problems as now you have unsatisfied bonds and thermal energy. Also these amorphous films (especially the metal oxides) have a tendency to re-crystallize at higher temps which is very bad for the film properties (leakage, breakdown, etc...) and generally speaking you want to keep these films amorphous.

Obviously IBM has done something (well) to stabilize the film whether it be 'doping' with a Si to form a silicate or nitriding the film. The only issue with Silicates is that it lowers the k value - the more Si you add the more the film becomes like SiO2 which is the film you are trying to replace! (and the k part of 'high k' is lowered which will make it harder to scale in the future). Though a HfSiO film will be a lot more thermally stable. Other metal oxide films like Al2O3 are more stable film (it has been in DRAM for a while now) so IBM could be using a variety of materials to help stabilize the film HfO2 film. (most of these generally speaking tend to lower the k value)

I can tell you this - there is NO WAY the IBM film is a simple HfO2 in a gate first process. So the key question is how scalable (to future tech nodes) the film will be from an electrical perspective - it seems as though it will work to 32nm based on the claims from IBM, but the more you add, potentially the harder the film is to scale.

For 45nm and likely for 32nm both schemes are likely valid - the question is which will be harder to scale...

Intel's approach has the bonus of leaving a wide variety of materials as an option (due to low thermal restrictions) - the downside is slightly added cost (probably not a big deal) and the fill issues (could be a big deal) in the future.

IBM's approach eliminates the fill issues (which makes feature scaling easier) but the key issue is how the thermal constraints (exposure to high temp anneal) impact future material choices.

It is difficult to say whether the fill or whether the future material constraints is the bigger issues going forward. Personally from an engineering perspective - I like Intel's approach which puts less limits on the material choices when HfO2 runs out of gas... the filling seems more like an engineering issue which can be solved. Of course IBM is always able to change their integration scheme if they run into a brick wall on future material choices...so who knows?

It'll likely be YEARS before we know who made the right choice.

Anonymous said...

It is good to see the high level of tech knowledge on the board, (intheknow & JJ stand out, and Sparks - we'll make a process engineer out of you yet!) as well as the good 'stratgerinessment' and guiding hand of Robo....

Thanks for making this an enjoyable place to post.

- Guru

SPARKS said...

“the more Si you add the more the film becomes like SiO2 which is the film you are trying to replace! (and the k part of 'high k' is lowered which will make it harder to scale in the future).”

“seems as though it will work to 32nm based on the claims from IBM, but the more you add, potentially the harder the film is to scale”

“It'll likely be YEARS before we know who made the right choice.”


Ah, GURU, your brilliance in process engineering is only superseded by your keen eye to know, exactly, where I was going with all of this.

Why I’m getting the suspicious feeling this new developing scenario is looking very much like the SOI vs. SiO crossroad paths IBM and INTC took years back which ultimately lead to Barcelona’s now historic failure and obvious process limitations you so accurately predicted months ago?

Therefore, even if delusional Wrector miraculously comes up with another “AMD Innovation” (courtesy of IBM), he or Dork, may be blindsided by future issues again! To quote Yogi Berra,” It’s Deja Vu all over again!” This was on my mind.

Guru, I am extremely flattered by your compliment, however, I can categorically say I don’t belong in the same sentence with, In The Know and Jumping Jack. They, obviously, have years of applied practical knowledge in the field, while I am merely a mechanic, albeit an excellent one.

Then again, as I have said before, my motivation is very simple. The elegance and dynamics of process engineering is fascinating; my deepest respect to all.

I am however, a Capitalist Pig, after all.

Thanks to all.

SPARKS

SPARKS said...

Additionally, had I known then what I know now, thanks you all, I would have shorted AMD back in Sept. 06’.

Then again, I’ve been saying this, my entire life, unfortunately. This is a day late and $20 short. Besides, I’m a chicken, and sometimes feel it’s simply ‘un-American’ to short anything. (What an asshole)

Thanks again.

SPARKS

accountant said...

I've been following this blog for a few months and have been learning a great deal. Congratulations to roborat for making this a place for objective discussion and to everyone else for contributing such a high-level of expertise.

I feel I must address khorgano's comment above. There is nothing wrong with AMD accounting for the grants and subsidies it receives as a reduction of their operating expenses. This is standard accounting procedure and everyone does it, including Intel. The overall long-term substance of those grants was to reduce operating expenses, hence they are being applied against it. The alternative is to record the grants as revenue and to inflate the top line, which is even more misleading. Also, regardless of whether you classify the grants received as revenue or a reduction of expenses, your bottom line should stay the same, and there shouldn't be any impact on EPS.

The only variable here is really how quickly they amortize the grants in against operating expenses - if too quickly, then you reduce your costs faster, making your profit look better. This is a matter of judgment, and you might be able to impact EPS by a cent or two by carefully choosing your "estimates".

Coming back to the original post by roborat, which was AMD's Financial Analyst Meeting, I was shocked at how little was said and how they pulled the same stunt on asset light, again. It seems like Goldman Sachs didn't buy it and they downgraded AMD's target price to $6. AMD might be a bargain like Hector Ruiz says, but he and his team haven't given us anything to bite into except faith, which has been evaporating into the ether. Plus, if I were a shareholder I'd be furious about Hector's raise. Paul Otellini must be rubbing his hands in glee at this Christmas present - if Hector can get a raise for what he did for AMD, imagine what Paul is going to ask the Intel board for (keep in mind that Paul's base salary is already some 30-40% less than Hector's).

In short, I feel Hector is skating on some very thin ice here. If he can't deliver, he'll be pushed out unceremoniously like Terry Semel at Yahoo was earlier this year, as an overpaid and underdelivering CEO who milked the company and couldn't deliver the results he was paid so extravagantly to do. I wish I knew what AMD's board is thinking.

SPARKS said...

“ imagine what Paul is going to ask the Intel board for (keep in mind that Paul's base salary is already some 30-40% less than Hector's).”

Do you think he really has to ask for anything? They would be out of their respective minds if they didn’t simply reward him outright.

Frankly, I believe, he is one of the few Corporate Exec’s that’s actually worth his salt, let alone, his weight in gold. I’d say 215 LBS. Hmmm, you’re an accountant. You do the math.

Anyway, welcome aboard!

SPARKS

Tonus said...

anonymous:

This is the popular theory and the "we need competition" at all cost argument. And while price drops may slow and you can argue the speed of innovation / or the speed of new product introductions may slow down without competition, may I present a counterargument?

I was not presenting it as an example of "we need competition", at least in the sense of wanting a healthy AMD because it drives innovation and pricing. I think that this happens in such a situation, but I'm looking more at the practical angle. If I'm a company with a product that I sell and an advantageous position in a market, I am not going to purposely stall innovation or force pricing just because I can-- market forces exist regardless of what fantasies may play about in my mind.

But for a few years now Intel and AMD have been working hard to gain a competitive edge while also either remaining profitable (AMD's challenge) or generating more and bigger profits (Intel's challenge, or perhaps Intel's goal). If AMD is faltering, how does Intel react? If you know you don't have to show your hand all at once, why do it? It's not about halting progress and freezing pricing, it's about having more freedom in those areas than you have for some years.

In any event, your counterargument was what I was hoping to see, and hopefully others can weigh in if they have differing or similar thoughts. Thanks for your post!

Anonymous said...

Accountant - I don't think the issue is the legality of how AMD applies the subsidies - as you state it is perfectly fine. The issue is with AMD's continuous and now SOP of weaseling around with the words.

AMD is spinning to the analysts who are asking about when they will be profitable by answering when they're operating income will be positive - this, as EVEN AMD knows, is not profitability and is a weak way of dodging the question. I think the previous point was - AMD should answer the profitability question which includes all income and ALL expenses not just all income and ONLY operating expenses.

I wish the analysts (who should know this as this is THEIR JOB) would not have simply let this go and drilled AMD on this.

accountant said...

Anonymous said: AMD is spinning to the analysts who are asking about when they will be profitable by answering when they're operating income will be positive - this, as EVEN AMD knows, is not profitability and is a weak way of dodging the question.

I think the analysts are knowledgeable enough to know the difference between operating income/profitability versus total net income/profitability. Yes, AMD is putting some spin on the situation by saying that they'll get to profitability but only operating wise, but both AMD and the analysts know what is being said. However, the word "profitability" makes for good news headlines.

If you look at AMD's financial statements, the only things that come "below the line", after operating net income, are interest income, interest expense and other miscellaneous charges. The bulk of this is interest expense, which they are locked in for and can't do much about now. If AMD can actually get to operating profitability, it would be a huge improvement and step forwards from where they are now.

If you look at AMD's financials for the year ended Q3 2007 vs 2006, revenues went up by about 9.5% year on year (not so great when you consider that 2007 includes ATI as well), but cost of sales, or the costs of direct production, have gone up by a staggering 60%. We already know that AMD's ASPs have dropped significantly, but it might also suggest that somewhere their production process is much more expensive as well - I'm fairly certain that ATI alone wasn't enough to drive up cost of sales by that much.

So if you look at the financials, what's really driving the losses is a sharp decline in ASPs and an expensive process that is mismatched to the revenue-generating ability of the product (i.e. native quad-core on 65nm is really costly and can't sell for much if it doesn't outperform the competition). ASPs usually tend to follow market leadership. Unless AMD can get back into a position of market leadership or at least market parity, prices will not improve. The only other variable they can then change is to get their cost of production (i.e. their process technology) down.

Anonymous said...

"operating income/profitability"?

Is there really a term operating profitability? I wasn't aware. (perhaaps GAAP and non-GAAP, but operating profitability?).

Look AMD dodged the question, and willfully is misleading - how many articles can you find on the web - saying AMD plans to return to profitability in Q3'08? Even ON FINANCE SITES!

The main problem I have (other than the trying to mislead folk) is the non-operating expenses for the most part ARE KNOWN. If AMD can model/predict that they will have a positive operating income in Q3'08, how hard would it be to subtract out the KNOWN interest expense? ...take the operating income, subtract the interest expense and holy cow - we have net income! AMD specifically CHOSE not to do this to make the environment look artificially better - and I genuinely think they rely on/hope folks misinterpert it (much like the whole we're ramping 45nm in H1'08 BS that the press fell for hook line and sinker)

So I'm curious as someone who goes by accountant - is there an actual accounting term called 'operating profitability'?

BTW - I think AMD CPU ASP's have gone down more than 30% (I can't find a link on this though) which is likely indirectly a large chunk of cost of sales - it's not so much cost of sales going up, it's revenue going down - as AMD indicates unit volumes keep going up so you really need to look at cost of sales normalized to unit volume to understand if it it is production (factory) costs. I think between CPU ASP's declining and the lower margin on the ATI products, that is why the cost of sales has 'gone up' (on an absolute scale). In reality I suspect it is more likely mostly due to AMD getting less revenue per part sold, and the cost per part produce is relatively flat (with the increasing unit volume accounting for the higher cost of sales). Of course you also need to look at the ratio of ATI R&D expenses to revenue vs CPU R&D to revenue... if the ATI ratio is higher this would also account for some of the increase as well.

accountant said...

Anonymous said: "Is there really a term operating profitability? I wasn't aware. (perhaaps GAAP and non-GAAP, but operating profitability?)."

Operating profit is indeed a GAAP term.

Anonymous said: "Look AMD dodged the question, and willfully is misleading - how many articles can you find on the web - saying AMD plans to return to profitability in Q3'08? Even ON FINANCE SITES!

I tried to find a transcript of the analyst day but could not find it (maybe the scribe was on vacation). I don't know what Hector said, but if he said "operating profitability", then there's nothing wrong with that. The analysts know what operating profitability is, a knowledgeable finance expert (according to the SEC) is expected to know what operating profitability is, and the term is defined by GAAP. If Hector said "operating profitability" and the press reports that as overall profitability, then this is a problem with the business journalists, and possibly the accounting profession for not educating folks properly, but not AMD. If AMD said they expect "profitability" to the analysts and then later qualified that as "operating profitability", then there is a problem there.

Anonymous said: "BTW - I think AMD CPU ASP's have gone down more than 30% (I can't find a link on this though) which is likely indirectly a large chunk of cost of sales - it's not so much cost of sales going up, it's revenue going down - as AMD indicates unit volumes keep going up so you really need to look at cost of sales normalized to unit volume to understand if it it is production (factory) costs. I think between CPU ASP's declining and the lower margin on the ATI products, that is why the cost of sales has 'gone up' (on an absolute scale). In reality I suspect it is more likely mostly due to AMD getting less revenue per part sold, and the cost per part produce is relatively flat (with the increasing unit volume accounting for the higher cost of sales). Of course you also need to look at the ratio of ATI R&D expenses to revenue vs CPU R&D to revenue... if the ATI ratio is higher this would also account for some of the increase as well."

I'm with you here. The decline in ASPs are probably the biggest contributing factor to their losses. I know they had some SKUs selling for >$1,000 before Core 2 came out, and now they don't have anything selling for more than $400 (on Newegg at least), even though their cost structure has likely stayed the same. It's hard to say anything more the cost side of the equation without knowing exact quantities produced and shipped and the split between the CPU and graphics businesses, but I find it hard to believe production increased by 60% when AMD was already at capacity or hasn't added any new capacity, and I doubt ATI could have accounted for all of that increase. Still, to get back to profitability they either need to get ASPs back up or costs down.

JumpingJack said...

"The decline in ASPs are probably the biggest contributing factor to their losses. I know they had some SKUs selling for >$1,000 before Core 2 came out, and now they don't have anything selling for more than $400 (on Newegg at least), "

I have had a chance to see the last two Mercury Research reports, and the trend for AMD is not good, their ASPs have dropped by over 40% since Core 2 launch....

A certain portion of the semiconductor industry is fixed costs, other capex can be variable... but overall, AMD has not done much to control the cost structure...

It does not take an accountant (no offense) to understand if costs remain relatively the same but prices drop then there will be a point where no money can be made...

I, personally, blame Hector's scortched earth market share at any costs policy in this regard.

SPARKS said...

“If you look at AMD's financials for the year ended Q3 2007 vs 2006, revenues went up by about 9.5% year on year (not so great when you consider that 2007 includes ATI as well), but cost of sales, or the costs of direct production, have gone up by a staggering 60%.”

Absolutely true, however, to me it is mind boggling that no mater how the bean counters rack up the losses, as long as a company maintains or INCREASES market share, “they look good”, incredible! Further, as revenues go up 1.00 they lose 1.60? This is better? Coo, coo! Coo, coo!

Wrector and his minions have been doing this for 4 quarters, directly in the face of HALF BILLION DOLLAR LOSSES per quarter, no less!!!! 2.2 Billion DOLLAR losses in 2007, but they still look good! “They increased market share!!!”, they cry!!! WTF!!!! 5.4 BILLION, payable in 4 years, assuming no future convertibles, with no viable competitive product, and have the balls to say the word PROFIT!?!?

They release a half assed broken product, partners and customers are scrambling, they can’t compete with INTC’s lowest tier Quad, priced accordingly, I might add, and they make it sound like this will be AMD’s salvation! They even put AMD’s stock rating in the 6 to 7 range based on two dozen or so brain trusts recommendations!

Market Cap is almost a billion less than they PAID for ATI!!!! Actual share value is probably in the 5 to 6 range and Wrector bitches!?!?!

Wrectors scorched earth policy doesn’t fool me for a second. What I’d like to know is who’s been pumping this dead pig and why?

There has to be a better way. You’re an accountant, you tell me!

SPARKS

InTheKnow said...

I have had a chance to see the last two Mercury Research reports, and the trend for AMD is not good, their ASPs have dropped by over 40% since Core 2 launch....

By way of comparison, what have Intel's ASPs done in the same period?

Giant said...

their ASPs have dropped by over 40% since Core 2 launch....

Pre-Core 2 AMD was selling an X2 3800 for $300. Now you can find them for $60.

Ho Ho said...

... but quite a few people will take duals costing >$130. When you don't OC your CPU then AMD is actually quite competitive in <$170 price range.

JumpingJack said...

By way of comparison, what have Intel's ASPs done in the same period?

This is a good question... and I will oblige.

I guess I should state clearly where I got that number, I looked at AMD's ASP for the best quarter I could find before C2D was announced and compared it to Q2 2007 ASPs (I have not seen what Q3 ASPs are, they are close to slightly up from the news reports). I then did the same for Intel.

Because Mercury Research is a copyrighted publication where this info is gold (the publication costs 10K just to purchase a copy), I will only give percentages, I am comparing Q4 2005 before the price war and close to the pinnacle of AMD's share gains --- I do not have the data for Q1 06, we do not get all the reports published they are published quarterly.

AMD's ASP is down about 38% from Q4 05 to Q2 07

Intel's ASP is down about 23% from Q4 05 to Q2 07.

Intel's ASP is significantly higher than AMD's, almost by a factor of 2 in Q2 07. And, in general, Intel has always had significantly higher ASPs (duh, they are usually more expensive)

Striking in the data is the reversal of Intel's ASP in servers, going up about 33% while AMD's went down about the same amount. But what has killed AMD is the DT and Mobile ASPs from that time period.

The stand out item when I was looking this up, in that for AMD is that their mobile ASP is not much higher than their desktop ASP (I would need to go look it up again if you want a hard percentage) where as Intel's mobile ASP is significantly higher than their DT.

Also, the recent push out of Barcelona has really thrown something of a mess in the MR projected quarters.

Giant said...

AMD is at $7.95 and falling. I hope none of you took Penix's advice (posted on Sharikou's blog) and sold your homes to buy AMD stock!

SPARKS said...

Giant, I hate to say, "I told you so", not you personally, of course. As you know, going back to my previous posts, months ago, I’ve been screaming for the poor bastards to get the hell out. In fact, I lost a friend who went big on AMD, trying to tell him he was out of his mind.

Ironically, what I saw so clearly by INTC’s sheer performance with CORE architecture, most were totally oblivious to its superiority. I’m no kid by any stretch; I have never seen anything like it. INTC’s CORE benchmarks were out as early as June 2006and the chips were released in July. They were unbelievable in every sense. The AMD fans, not investors, stayed on and believed all the spin they could eat right up to the present day.

I posted this in ‘Business Week’ in October ’06, (I’m J.M.S) read the entire thing just to see how blind these poor bastards were. To this day, and for the rest of my life, I’ll never forget this 15 month tragic chain of events culminating with today’s Advanced Micro Devices. What a sham. I’ll never get it, as long as I live.

Look especially at the Oct. 23 comment.

http://app.businessweek.com/
UserComments/combo_review?
action=all&style=wide&productId=
11253&pageIndex=1

SPARKS

Anonymous said...

Sparks - you should rent 'Enron the smartest guys in the room'

It is a fantastic documentary and fairly even handed as well as informational on what went on. What is often missed is the complete lack of skepticism by almost every analyst (except one) and in some cases they were believed to be complicit.

I have a plane ride tomorrow and plan to watch it again (of course since I'm using a Centrino duo - I can actually probably watch a 2nd movie too!)

Giant said...

Wowzers! Does Phenom ever have heat issues at high clockspeeds!!

Look at what this guy had to do to run a Phenom at 3Ghz:

http://forums.amd.com/forum/messageview.cfm?catid=13&threadid=89926&enterthread=y

By comparison, my Q6600 (this is B3 stepping, not the newer G0 stepping) runs at 3Ghz 24/7 with a voltage reduction from stock. My cooling is just a Thermaltake Big Typhoon VX with the fan on the lowest setting. I've had this CPU at 3.3Ghz, but with more voltage and the fan set to high. G0 hits 3.6Ghz with similar air cooling.

InTheKnow said...

I found this comment from an article on computerworld to be interesting.

"Intel's 45nm move was fully expected. But it's true that the pressure is on everyone else, not necessarily to be the first to 32, but to at least be close," said Olds. "It costs a lot of dough to be on the cutting edge, and it's risky. You can screw up your fast chips in a whole bunch of ways and it can be hugely expensive to fix them -- not to mention the time lost … The best answer is to gang up with other bright guys and get the technology right together."

I have to dispute the "best answer" comment. There are advantages to going it alone.

First, you can ensure that your process and design strategies mesh. Second, you control the schedule (as much as possible in a development environment). And third, there is no need to compromise.

Everyone has their own ideas as to what the best solution to any given problem is, and in any effort by a collective group, compromises will have to be made. It is my opinion that a solution that is a hodgepodge of compromises will not be as good as a solution that has a coherent design philosophy.

So other than the shared cost structure, I'm not sure what other advantages a consortium brings to the table.

Anonymous said...

Well at least I won't miss his moronic "Intel BK set for Q208" or more recently "Q109". His credibility sunk into the single digits to match his IQ with that "prediction".

I think the problem that many are facing is that after months of posts that were looking forward to the release of AMD's Barcelona processors, the rollout has been very disappointing. And it's hard to continue to make posts about how things will improve after the most recent events. If AMD can get things rolling again (Phenom @ 2.6GHz and faster, soon) then there will be more optimism and reason to speculate with some hope.

I think that AMD burned a lot of its loyal supporters this last couple of months. Not being able to catch up or keep up with Intel, under the circumstances, is not such a bad thing as long as they were being honest about where they stood. But the many broken promises and mess they made leaves many people with a sour taste in their mouths.

"Perhaps AMD should stop spending time and energy trying to sue others and blaming others for their failures."

I tend to agree with the current set of problems. AMD and/or governments has the right to pursue this for potential past transgressions, but clearly the 'monopoly' is not the cause of the AMD's current problems. I think AMD's mgmt conveniently intermixes these hoping folks may not realize this distinction.

My question is this though... is the EU looking for recent stuff (within the last 2 years say) or older stuff? And what exactly is the SPECIFIC damage done to the EU? I can see AMD trying to make a claim (if anything is proved) but what about the EU? If rebates or whatever is deemed anticompetitive then I can see how this impacted AMD, but if the prices that consumers were paying were still low and competitive (like they are now), how exactly is the EU consumer injured? These are not European companies. Does the EU fine companies who sell clothes in the EU that are done by labor at ridiculously low salaries?

This, to me, in disingenuous. If the argument is that consumers got hurt then I eagerly wait to see if the EU distributes checks to all those who purchased a computer in that time period they allege (should they actually levy a fine). Somehow though, I don't think we will see that (call me a cynic).


We all know that Intel fans are the biggest cock suckers of them all and just as long as we get what we want everyone else can go fuck themselves.

The truth is that this board really sucks. The main people who come here are Intel employees who just want a chance to stroke themselves anonymously.

If the issue is that AMD was injured, than AMD (NOT THE EU) should be the ones pursuing this as they are doing in the US.

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