Sometimes an Intel delay can be bad news for AMD

A report or a rumour, whatever you wish to call it, comes from Digitimes suggesting Intel could be delaying the release of its 45nm desktop CPUs. Intel’s reason, according to the site is due to lack of competition in light of AMD’s current problem shipping Phenoms. This statement is highly controversial and I am sure everyone has read the wide ranging opinions from all over the net. What I find frustrating is the over zealous analysis based from a CPU performance stand point. It is ridiculous to think that Intel’s production planning decisions are based on the competition missteps rather than pure market demand. If we assume that the rumour is correct, I can assure you that Intel (likewise any sensible company) will only delay a certain product because such an action creates the maximum return, either immediate or long term.

As a manufacturing company, volume is vital for Intel. The more volume it can produce on a set of tools (i.e., new 45nm tools), the lower the unit cost becomes. Also bear in mind that 45nm depreciation begins the moment the tool is used for revenue products. Intel doesn’t have a choice but to feed their new 45nm production lines as close to 100% capacity as possible. With the volume fixed at maximum, the real question is not what product Intel is trying to delay, but instead, try and figure out what Intel is trying to produce in volume as a replacement.

Think mobile. For the past two quarters Intel has shifted its focus and has thrown all its marketing resources in this space. Nonetheless, AMD continues to remain successful in this segment taking more market share while at the same time driving ASPs significantly downward. If Intel wants to fight back using every competitive advantage it can get with 45nm, I don’t see why not. So again, if the rumour is indeed true, just try and imagine what AMD’s mobile offering will be up against in the coming months. Armed with a lower cost-per-unit, there should be fewer businesses where Intel will be “walking away from”.

AMD ATI sucks according to one angry man

It looks like AMD managed to piss off someone who seem to have a habit of creating hate websites. His anger stems from the fact that AMD sold him a Radeon X1950Pro which was advertised as Vista Certified but turns out not to be the case.

http://www.amd-ati-sucks.com/

This is, of course, only one side of the story and I'm sure returning a product requires less effort than paying for a URL and creating an entire website. I'm simply posting this because I know some of you like to fan the flame. Enjoy.

AMD's Financial Analyst Meeting

AMD is holding its annual Financial Analyst Meeting on Dec 13, 2007. Like many analysts, I am beginning to wonder what benefit would anyone get attending this PR exercise. There was a time when AMD held similar events and anyone participating would only get straight answers. Today it’s all about vague promises, secrecy and if you’re lucky enough to get a definite answer it’s always a million miles off target. Take for instance last years Analyst Day (Dec 14, 2006). Everyone clearly remember this as the last rosy presentation from AMD. Despite the dark Core2-cloud looming overhead, business was good and the company was in a position to take control of 30% of the overall market. As we all later found out, the rosy outlook was quickly followed by an earnings warning; the first of the series of massive half a billion dollar losses.

If we were to consider the added value of AMD holding another financial analyst day, we should first look at the track record of the last one held. In summary, here is what AMD projected for 2007:
K10 quad-core ramp: 2H’07; actual result: pushed out possible mid Q1'08
Barcelona performance: 40% better; actual result: ~40% worse (non-compliant SPEC benchmarks)
CAPEX: $2.5B; actual result: 2007 estimate will be at $1.7B (Fab38 delayed)
Revenue (long term target): ~$7.6B; actual result: $6.02B (average analyst estimates)
Gross Margins: 50+/-2%; actual result: 35% (last 3 qtrs)
2007 growth: 10% above industry (16%); actual result: -455%

As you can see, you’re probably better off using monkeys throwing darts at targets than rely on AMD to assess its own outlook. That's also because we know that monkeys have no intention to look good in order to keep their jobs. On a positive note for AMD, since they got last years outlook absolutely wrong, getting at least one prediction right would put them infinitely better in assessing their own future.

All AMD needs is some TLB

TLB – translation look-aside buffer. Sounds techie and yet doesn’t sound so disastrous. Bear in mind that TLB is a microcircuit within the CPU and what AMD wants you to know is where the problem occurs while not necessarily telling anyone what went wrong and what changes are required to fix it. Or maybe I’m just the type that wants more detail. As a consolation they did say what could happen and I suppose the worst is a “system hang” with a very low occurrence rate. It’s not really the worst problem but you can scratch servers that might be used for critical missions off your customer list. Above anything else, this should be the reason why no OEM is shipping Barcelona servers at the moment. The seriousness of this bug makes even the poor performance just an after thought.

The fact that the problem is across the K10 platform (Opteron and Phemon) makes it possible that this is a micro-architectural problem and should have been identified at the Functional Validation stage. There are several other validation screens in place to catch problems like this but because it managed to slip out makes this more of a symptom of how AMD operates these days. A rushed and under resourced design process can lead to disasters like this. But to be fair to AMD no amount of pre-silicon validation can successfully screen the complexity of today’s microprocessors. Running a full chip simulation on an almost infinite amount of combinations of dyadic instructions is impossible especially when time is crucial.

Validation Primer:
There are two levels of validation and they are done at pre-silicon and post-silicon levels. At pre-silicon, Functional Validation and Logic testing are done.
Functional Validation is a simulation done to test different micro-architecture features such as Barcelona’s TLB. This is time consuming and compute-intensive, typically running assembly language in low single digit Hz speeds completing billions of cycles per week. The test is feature-focused and localised.
The other pre-silicon validation is logic testing and the purpose is to validate circuit behaviour using logic sequence and combinations.

Post-silicon validation involves Performance Verification, Design Validation and ultimately Manufacturing Validation.
At Performance verification the chip is tested against physical specifications such as leakage, voltage, temperature and more importantly speed and timing. Being slow and leaky, anyone can imagine how AMD would have felt when K10 reached this stage. Timing analysis is done here and if Barcelona had critical path problems at the L3 TLB like GURU suggested, they should have detected the problem at this stage.
The next step is Design Validation where a complete system level check is done. At this stage the CPU is attached to normal peripherals (i.e., BIOS, chipsets, Operating System) and all features of the chip are tested.
The last step is Manufacturing Validation where yield becomes the major metric which is essentially driving overall cost to manufacture. Unfortunately for AMD their problem with design is compounded by 65nm process issues.

Due to lack of information, it’s hard to say if AMD is applying a circuit/architectural design change or a process design change on the B3 stepping. A circuit design change points to a poor pre-silicon validation process while a process design change (i.e., change in CD’s) points to post-silicon validation mistakes. To be honest, with the amount of problems K10 is having only God knows how many modifications AMD plans to include in their next stepping. We hope they get it right this time around because I can only feel sorry for the guy who buys a tri-core Phenom with a microcode patch disabling the TLB. Surely there is a line in the sand that says when a product in broken and cannot be sold.


Update: In relation to my blog post on the 27th Nov wondering where the AMD stock would settle, well today the stock closed at $8.91 as it continues to slide downward. It appears like institutional investors are finally bailing out so no bottoming out just yet.

One!

It is exactly a year ago when this blog started. Once intended as satire for an infamous blog site, I suppose today we can say that we have outperformed Scierikou in terms of accuracy and usefulness in predicting the future and providing analysis on current events. It is indeed facinating that what we have been discussing collectively for the past several months only ends up lately on someone else's blog. Throughout the year we've been accused of painting AMD in a bad light but we managed to prove that it's only because there's a thick dark cloud hanging over it. We've been brutal and honest but so is the truth.

I would just like to mention that this site never really kicked off until our friend Sharikou180 provided a link to this site. Site activity wouldn't have picked up if it wasn't for the people that come here and contribute. Many thanks everyone.

Looking ahead, I'm considering the option of opening up this blog for additional contributors. I can see that some put considerable effort in their post which are at times quite noteworthy and insightful enough of being an article by itself. The two options for contributing are adding authorised authors (requires blogger account), and as for our friends in the "industry" that requires anonymity, you can send your article through e-mail (I will post the article under your chosen pen-name).

What do you think?