tag:blogger.com,1999:blog-2602471396566186819.post4136837250210386362..comments2023-10-26T15:06:30.940+00:00Comments on AIMeD Corporation: All AMD needs is some TLBRoborat, Ph.Dhttp://www.blogger.com/profile/04845879517177508741noreply@blogger.comBlogger78125tag:blogger.com,1999:blog-2602471396566186819.post-46658416892744456722008-05-06T10:32:00.000+00:002008-05-06T10:32:00.000+00:00Well at least I won't miss his moronic "Intel BK s...Well at least I won't miss his moronic "Intel BK set for Q208" or more recently "Q109". His credibility sunk into the single digits to match his IQ with that "prediction".<BR/><BR/>I think the problem that many are facing is that after months of posts that were looking forward to the release of AMD's Barcelona processors, the rollout has been very disappointing. And it's hard to continue to make posts about how things will improve after the most recent events. If AMD can get things rolling again (Phenom @ 2.6GHz and faster, soon) then there will be more optimism and reason to speculate with some hope.<BR/><BR/>I think that AMD burned a lot of its loyal supporters this last couple of months. Not being able to catch up or keep up with Intel, under the circumstances, is not such a bad thing as long as they were being honest about where they stood. But the many broken promises and mess they made leaves many people with a sour taste in their mouths.<BR/><BR/>"Perhaps AMD should stop spending time and energy trying to sue others and blaming others for their failures."<BR/><BR/>I tend to agree with the current set of problems. AMD and/or governments has the right to pursue this for potential past transgressions, but clearly the 'monopoly' is not the cause of the AMD's current problems. I think AMD's mgmt conveniently intermixes these hoping folks may not realize this distinction.<BR/><BR/>My question is this though... is the EU looking for recent stuff (within the last 2 years say) or older stuff? And what exactly is the SPECIFIC damage done to the EU? I can see AMD trying to make a claim (if anything is proved) but what about the EU? If rebates or whatever is deemed anticompetitive then I can see how this impacted AMD, but if the prices that consumers were paying were still low and competitive (like they are now), how exactly is the EU consumer injured? These are not European companies. Does the EU fine companies who sell clothes in the EU that are done by labor at ridiculously low salaries?<BR/><BR/><BR/>We all know that Intel fans are the biggest cock suckers of them all and just as long as we get what we want everyone else can go fuck themselves.<BR/><BR/>The truth is that this board really sucks. The main people who come here are Intel employees who just want a chance to stroke themselves anonymously.<BR/><BR/>If the issue is that AMD was injured, than AMD (NOT THE EU) should be the ones pursuing this as they are doing in the US.<BR/><BR/>This, to me, in disingenuous. If the argument is that consumers got hurt then I eagerly wait to see if the EU distributes checks to all those who purchased a computer in that time period they allege (should they actually levy a fine). Somehow though, I don't think we will see that (call me a cynic).Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-5899725252796360242008-02-02T09:25:00.000+00:002008-02-02T09:25:00.000+00:00I can always get more goodwill with the guys by no...I can always get more goodwill with the guys by not running short of vaseline.Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-75712791853556867902007-12-12T20:36:00.000+00:002007-12-12T20:36:00.000+00:00"AMD is going to have some charges for goodwill im..."AMD is going to have some charges for goodwill impairment" here's the link (not much in it)<BR/><BR/>http://www.sec.gov/Archives/edgar/data/2488/000119312507263283/d8k.htm<BR/><BR/>"The Company expects that the impairment charge will be material, but the Company has determined that, as of the time of this filing, it is unable in good faith to make a determination of an estimate of the amount or range of amounts of the impairment charge."<BR/><BR/>I'm surprise they didn't say they couldn't provide the amount as it might give our competitors an advantage! I guess an official government/SEC filing can't contain BS lies as there might actually be consequences, as opposed to having the press report your lies.<BR/><BR/>Hopefully they learn from the subprime guys and get the full amount out as early as possible and not have the slow death trickle.<BR/><BR/>Timing is rather coincidental, a day before the analyst meeting?!? I guess they couldn't hide it any longer and realized if they didn't bring this up before or during the meeting they'd really piss people off. And doing it this way they do the "refer to the filing, we don't know how much...next question please..." It also get the losses in the books in 2007, and lets them start 2008 without similar charges (good for year on year comparisons).Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-16592041949426450112007-12-12T16:10:00.000+00:002007-12-12T16:10:00.000+00:00AMD is going to have some charges for goodwill imp...AMD is going to have some charges for goodwill impairment. So another quarter of bumper losses, I expectShttps://www.blogger.com/profile/03806538116393866175noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-34700676370800250182007-12-12T06:36:00.000+00:002007-12-12T06:36:00.000+00:00Corrected exchange below.Analyst: Hector, can you ...Corrected exchange below.<BR/><BR/><BR/>Analyst: Hector, can you tell us more about Barcelona's TLB bug?<BR/><BR/>Hector Ruiz: Sorry, we only talk about our products at the Technology Analyst Meeting in spring.<BR/><BR/>Analyst: Fair enough. Can you then tell us when you think AMD will return to profitability? <BR/><BR/>Hector Ruiz: Do you know that Barcelona is the world's first native quad-core? Yeah, we make them puppies, we are tracking to our Q3 guidance of 100's of thousands shipped...<BR/><BR/>Analysts: Do you mean 100's of thousands shipped in Q4, will this actualize revenue?<BR/><BR/>Hector: No, I mean 100's of thousands eventually.... we have always ran inventory lean and right at the moment our inventory is lean. Yields are where we want them, we are happy with our yields as we achieved mature yields on the first 1000 wafers.Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-52018400630769753632007-12-12T06:35:00.000+00:002007-12-12T06:35:00.000+00:00anoymousAnalysis on Rivas' comments in this new T...<B>anoymous</B><BR/><BR/>Analysis on Rivas' comments in <A HREF="http://techreport.com/discussions.x/13778" REL="nofollow">this new TechReport article </A> by Cyril KowaliskiAnonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-49496324828597054712007-12-12T01:00:00.000+00:002007-12-12T01:00:00.000+00:00Just curious - noone is concerned about Rivas stat...Just curious - noone is concerned about Rivas statement regarding K10 clockspeeds:<BR/><BR/>"Those processors are listed at clock speeds that account for the degradation from the BIOS fix"<BR/><BR/>I'm thinking/hoping he mis-spoke and was just trying to make an excuse for the lack of high speed parts...but his statement makes it sound like AMD is RELABELING the actual clockspeed with an 'effective' clockspeed?<BR/><BR/>Unless the TLB actually impacts the clock circuit itself? (which I find hard to believe, though admittedly I'm no expert in this area)<BR/><BR/>He makes it sound like they are taking a part with say a 2.6GHz clock and saying...well it performs like a 2.3GHz so we'll label it as 2.3GHz.Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-34600357434472308902007-12-11T23:44:00.000+00:002007-12-11T23:44:00.000+00:00Anonymous said: "To me the analyst meeting on Thur...Anonymous said: <I>"To me the analyst meeting on Thursday will be more interesting... </I><BR/><BR/>the Thursday meeting is a Financial Analyst Meeting and typically AMD wants to focus more on money matters.<BR/><BR/>Analyst: <I>Hector, can you tell us more about Barcelona's TLB bug?</I><BR/>Hector Ruiz: <I>Sorry, we only talk about our products at the Technology Analyst Meeting in spring.</I><BR/>Analyst: <I>Fair enough. Can you then tell us when you think AMD will return to profitability? </I><BR/>Hector Ruiz: <I>Do you know that Barcelona is the world's first native quad-core? Yeah, we make them puppies.</I>Roborat, Ph.Dhttps://www.blogger.com/profile/04845879517177508741noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-25835362433431213812007-12-11T21:49:00.000+00:002007-12-11T21:49:00.000+00:00"Boot! they don't seem to have very high standards..."Boot! they don't seem to have very high standards."<BR/><BR/>Come on man - once they boot, a task manager demo showing all cores being utilized is just around the corner!<BR/><BR/>Also the "we consider it rev C" is complete crap to make things seem like they are far along on the architecture at this point. It appears as though they are still in the debug stage - far along in that stage, but still not in the 'let's just focus on mass producing these and driving cost down' that is typically associated with something when it is at ramp. The steppings at this point should be tweaks to improve power or speed or give more process marginality to drive down production costs.<BR/><BR/>As for 45nm, we won't know much, even if these things do boot - I'm sure some will call it success and on schedule and 'closing the gap', but without any clock or power or Vcore data (which I doubt AMD will share), we'll have no idea how things really are. Again AMD will use the press' ignorance and will probably get some good PR on how things are changing for the better at AMD, because the press covering this won't know the right questions to ask.<BR/><BR/>To me the analyst meeting on Thursday will be more interesting. If they are able to give SPECIFIC details on ramp rates or specifics on the roadmap then they may be starting to get a handle on things - dates vs clock and power for various products, specific ramp rates for K10, for 45nm, for dual core K10's, etc...<BR/><BR/>If it is another 'launch XYZ mid year', '45nm introduction on schedule', 'fastest ramp ever' or a focus on bulldozer, fusion and other future products - then it will clearly be a signal about K10's current health and viability. Lack of details won't mean that the architecture will never be good, but it will be a clear signal to me that AMD doesn't have a handle on the architecture and/or 65nm process.<BR/><BR/>Also I think this is the meeting where we find out if Asset light was a bunch of management speak to stall for time (while trying to raise cash) or an actual business plan. If they don't have details on this after what, 9 months?, or we hear another 'we don't want to tip our hand to our competitor', then we'll know Hector is an incompetent CEO who simply rode the success of an already designed K8 part, that had nothing to do with his management. The house is on fire? Hey can we have someone come up with a plan to get some water to put it out? Oh and don't share the plan because the house next door, which has sprinklers installed throughout the house as they may learn from us. By the way we are thinking about remodeling the house, anyone want to invest or provide us a loan - we should have the fire out soon and it (the fire= profitability) is our main priority!Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-86622618119619513742007-12-11T20:00:00.000+00:002007-12-11T20:00:00.000+00:00I’m fairly confident that those puppies are going ...<I>I’m fairly confident that those puppies are going to boot,”</I> said Mario Rivas,<BR/><BR/>Boot! they don't seem to have very high standards. maybe they should start debugging their chips ;)<BR/><BR/>and why is he calling them "puppies". I get nervous when supposedly technical people start talking this way. "yeah, we found some of 'em TLB bug thingies. right now we're smoking them out!"Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-65880769359283274202007-12-11T18:56:00.000+00:002007-12-11T18:56:00.000+00:00if you guys want to read something comedic, you sh...if you guys want to read something comedic, you should check out the Phenom 9500 reviews on newegg.com.<BR/><BR/>Many of them start with "Listen Intel fanboys..." and then go into immediate defensive mode on their purchase.<BR/><BR/>Here is a recent gem:<BR/><BR/><I>Cons: I'm using the cons space to explain more things about this chip, because there are no cons here. Intel can say it has 3 GHz quad core processing becasue of the architecture. Intel has an L1 cache that goes to two L2 Caches and then those go to two L3 caches. So it's two Quad cores smacked together and linked by an L1 cache. It will back up, things get jammed in there, and it slows it down. AMD avoided that problem by actually creating an L1 cache that went to 4 L2 caches. It creates less back up, they go directly to the cores which goes for more reliability, and more speed.</I><BR/><BR/>hahahaAnonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-4618949673085634412007-12-11T18:40:00.000+00:002007-12-11T18:40:00.000+00:00"We will have initial samples also in January"If w...<I>"We will have initial samples also in January"</I><BR/><BR/>If we believe Scientia then it'll take one year from samples to production. I guess when I said <I>"we'll see as much 45nm CPUs from AMD in 2008 as we saw 65nm in 2006"</I> is more correct than I thought.Ho Hohttps://www.blogger.com/profile/00177815588184912351noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-48824082286242259942007-12-11T17:33:00.000+00:002007-12-11T17:33:00.000+00:00Happy, happy, joy, joy!Shanghai is MIA“We have 45n...Happy, happy, joy, joy!<BR/><BR/><A HREF="http://www.xbitlabs.com/news/cpu/display/20071210230006_AMD_s_Next_Gen_Microprocessor_Still_Does_Not_Exist_Company.html" REL="nofollow">Shanghai is MIA</A><BR/><BR/><I>“We have 45nm on the way. We will have initial samples also in January. I’m fairly confident that those puppies are going to boot,” said Mario Rivas, executive vice president of computing products group at AMD, in an interview with CRN web-site.</I><BR/><BR/><I>“The 45nm, we consider it Rev C of the device. So all the learning, all the hard knocks that we had on Barcelona, we're going to apply it to Shanghai,” Mr. Rivas added.</I><BR/><BR/><B>"Learning?" "Hard knocks"?</B> These sound like euphemisms for <B>piss poor execution</B> and <B>biting more than we could chew</B> to me.<BR/><BR/>Why didn't <B>Randy Allen</B> make these comments?<BR/><BR/>ROFLMAOGutterRathttps://www.blogger.com/profile/00341776176654352078noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-22842139561770832532007-12-11T14:45:00.000+00:002007-12-11T14:45:00.000+00:00also love how all of these websites fail to put "1...<I>also love how all of these websites fail to put "100's of thousands" into any sort of perspective.</I><BR/><BR/>Indeed. Scientia and others were pointing out that the two million quad core CPUs Intel sold last quarter only made up a tiny amount of their total production. I wonder if they'll do the same for the 'hundreds of thousands' of quad core CPUs that AMD is shipping this quarter?<BR/><BR/>Also see this:<BR/><BR/>http://www.fudzilla.com/index.php?option=com_content&task=view&id=4656&Itemid=35<BR/><BR/><I><BR/>AMD needs to find a sweet spot between profitability and a good price, and obviously it has to offer more for the price than Intel with its quad core Yorkfields. The 45nm Intel parts are a fierce competitor, but with the right strategy AMD might have a good chance.<BR/></I><BR/><BR/>So AMD is going to spark another price war with Phenom? This is going to end in tears for AMD! You're talking about a 280mm2 die compared to two 107mm2 die for a 12MB Yorkfield quad core. Intel can also make value quad core parts with 6MB cache, using two 3MB L2 cache die. I don't recall the exact die size for this (someone fill me in thanks :-) ) but they are under 100mm2 each.Unknownhttps://www.blogger.com/profile/04674699447174785970noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-78772716988159399342007-12-11T08:19:00.000+00:002007-12-11T08:19:00.000+00:00"In a statement, the firm reiterated its position ..."In a statement, the firm reiterated its position at the Q3 conference call.<BR/><BR/>It said during that call that AMD would ship "hundreds of thousands of quad-core processors" into the server and desktop segments during Q4".<BR/><BR/>AMD said it's "tracking" to that guidance."<BR/><BR/>Source - INQ and a variety of other places have published this crap!<BR/><BR/>Why is AMD boasting about tracking to their plan of essentially achieving a conversion of 1-2% of it's total production? 4 months after launch and K10 will be ~1-2% of their total production? This being "the most important launch of 2007" (to use AMD's words)...apparently it was so important AMD rapidly converted their production to an astounding 1-2% in a mere 4 months. <BR/><BR/>Can't wait to hear from the peanut gallery that kept hammering on Intel's "slow" conversion to Core 2. (6 months after launch, server was ~50% converted and I believe desktop was ~20-30%, not sure about mobile but it was the lowest of the 3) I also love how all of these websites fail to put "100's of thousands" into any sort of perspective.Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-25592599968064789472007-12-11T08:01:00.000+00:002007-12-11T08:01:00.000+00:00You know what - I at least have some respect from ...You know what - I at least have some respect from that CRN interview for Rivas to say "With the data I have now, clearly, that was a stupid decision."<BR/><BR/>Keep in mind I'm sure there are likely 100's of things seen in the lab that either can't be reproduced again or are honestly considered low level issues. While the PR AMD has done on this issue has been HORRENDOUS... the explanation Rivas gives is at least plausible.<BR/><BR/>Now this I'm not so sure about:<BR/>"Those processors are listed at clock speeds that account for the degradation from the BIOS fix, he said, explaining why the first available Phenoms have listed speeds and prices below those AMD initially projected for fourth-quarter shipments."<BR/><BR/>WTF?!?! So AMD is just relabeling actual clockspeed into converted clockspeed?!? Isn't that what the model #'s are for? I can see them adjusting prices for the degradation, but for them to take say an actual 2.4 or 2.6GHz clocked chip and just relabel it at a different clockspeed seem disingenuous, no?<BR/><BR/>So should folks believe the CPU-Z listed speed... is that actual or 'corrected'?<BR/><BR/>So basically it is SOLELY the issue of the BIOS fix (5-20%) that is the cause of the lower clocker Phenoms? He may be selling it, but I'm not buying it (it = the BS explanation on failure to hit clocks)...<BR/><BR/>And what would be the cause of the Barcies being 2.0GHz (or I should say 1.9)? The BIOS fix must be causing a >20% hit on that part, eh?<BR/><BR/>Just when you start to think they are starting to get it...they continue with the excuse mongering.Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-66890932117365073942007-12-11T07:38:00.000+00:002007-12-11T07:38:00.000+00:00Finally, the whole background of the AMD current i...Finally, the whole background of the AMD current issue:<BR/><BR/>http://www.crn.com/white-box/204800718<BR/><BR/><I>"It was not until mid-November that it actually moved from just being an observation in a testing environment to being a more serious bug. We tried to do BIOS workarounds, we looked for board modifications, even in some instances, for some patches we could do that would not degrade performance," he said.<BR/><BR/>When AMD came to the decision that the glitch could "affect a real-world application," Rivas said the Sunnyvale, Calif.-based chipmaker quickly alerted customers.<BR/><BR/>"When we reached that point, it was a Friday and we started notifying the customers on Monday," he said.<BR/><BR/>AMD developed a workaround for a bug that causes data integrity problems related to the translation lookaside buffer (TLB) on quad-core Opteron and Phenom CPUs. But performance degradation caused by the workaround on the Opteron server-workstation processors was such that only a few customers decided to go ahead with orders. </I><BR/><BR/>Some of the AMD true supported justified that all CPUs have errata one way another.<BR/><BR/>Some of the AMD fanbois said that Intel CPU has a equal serious issue, and cheered over an rumor of an Yorkfield issue.<BR/><BR/>And now finally we know that the issue is actually quite serious as it will appear in real life usage(not yet showstopper, as it is workaround-able, albeit affect performance)pointerhttps://www.blogger.com/profile/17388854963223201475noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-37326542176917686452007-12-11T05:12:00.000+00:002007-12-11T05:12:00.000+00:00"I always wind up missing a few holes."Actually yo..."I always wind up missing a few holes."<BR/><BR/>Actually you're words have more wisdom then you realize.... with BILLIONS of gates, you miss one and well, you got issues...or a tri-core! (couldn't resist)<BR/><BR/>FINFET/TRIGATE will be a challenge for 32nm (my guess would be 22nm is best case). The 3D structure introduces all sorts of new issues to work out. My take is that it will work eventually though.Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-49061877260437538702007-12-11T04:42:00.000+00:002007-12-11T04:42:00.000+00:00yeah, i'd use Wiki when i get lazy, and use that f...yeah, i'd use Wiki when i get lazy, and use that for some high level picture.<BR/><BR/>One comment on Wiki though ... I believe some AMD fanbois are always to update bad news on the Intel (as recent as its advertisement controversy) , and you won't see that on the AMD page (none on any bad references to the K10m etc).<BR/><BR/>you have to be amazed by the AMD fanbois capability.pointerhttps://www.blogger.com/profile/17388854963223201475noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-42903199161915028722007-12-11T02:47:00.000+00:002007-12-11T02:47:00.000+00:00What the hell do I need Wiki when I have you guys....What the hell do I need Wiki when I have you guys. <BR/><BR/>Besides, when you guys want to hookup 1200A (and up) UPS system, don't go there, trust me. It will NEVER pass the NEC.<BR/><BR/>"This link also has a SEM image of Intel's Tri-Gate prototype"<BR/><BR/>Ah, good, so long as INTC is working on the thing, too. If they can't make it fly NO one can, at least on a HV level.<BR/><BR/>"These are generally speaking the smallest feature on the chip so filling them is not trivial."<BR/><BR/>Got it, GURU. Dig out the old stuff, put in the new/better stuff. <BR/><BR/>It would seem to be a P.I.A for a process. I can't even get ALL the butter in an English muffin correctly, let alone getting it out!. I always wind up missing a few holes.<BR/><BR/>Hmmm, multiple source/drains, electrically, I could be off here, but when I double the number of conductors, I half the currant per conductor and thus halving the resistance (heat?) Seems like a nice scheme. <BR/><BR/>You guys didn’t say whether it will work or not, however. And, at 32?<BR/><BR/>SPARKSAnonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-10340709925948297442007-12-11T01:56:00.000+00:002007-12-11T01:56:00.000+00:00Wikipedia IS NOT YOUR FRIENDLOL, I said that with ...<I>Wikipedia IS NOT YOUR FRIEND</I><BR/><BR/>LOL, I said that with my tongue firmly planted in my cheek. It's a good place to get started or an overview, but never for a legitimate source.Orthogonalhttps://www.blogger.com/profile/03773729604928131840noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-2413328261262781442007-12-11T01:46:00.000+00:002007-12-11T01:46:00.000+00:00"Wikipedia is your friend"Wikipedia IS NOT YOUR FR..."Wikipedia is your friend"<BR/><BR/>Wikipedia IS NOT YOUR FRIEND - there is so much unsubstantiated crap on there that disguises itself as "peer reviewed" especially scientific stuff. That said the description above is OK and if Wikipedia has real references (not by references by parties which have a vested interest) it is OK.<BR/><BR/>As for gaps in Si - replacement flow (or gate last) means, the transistor is built conventionally like the old days, but before metallization the gate is etched out and the metal gate is put in its place (thus "replacing" the old gate). These are generally speaking the smallest feature on the chip so filling them is not trivial. (They are smaller than the tech node size, so 45nm will have less than 45nm gates)Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-66639428654892987612007-12-11T01:29:00.000+00:002007-12-11T01:29:00.000+00:00Sparks, Wikipedia is your friend ;)http://en.wikip...Sparks, Wikipedia is your friend ;)<BR/><BR/>http://en.wikipedia.org/wiki/Finfet<BR/><BR/>A Finfet is one of many different Multi-Gate transistor devices. This link also has a SEM image of Intel's Tri-Gate prototype. Instead of having a "2-D" plane for the gate stack over the transistor channel. The Finfet has a Gate on multiple sides of an active region. The transistor channel is built in 3-D allowing you to have greater effective gate surface area over the device. This allows for greater drive current and less voltage and power. In the case of Intel's Tri-gate transistor, it's also possible to have Multiple FINs or Source/Drains on the same device.Orthogonalhttps://www.blogger.com/profile/03773729604928131840noreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-81818591459310663752007-12-11T01:03:00.000+00:002007-12-11T01:03:00.000+00:00"FINFET / Tri-gate"All right GURU, I'll bite, what..."FINFET / Tri-gate"<BR/><BR/>All right GURU, I'll bite, what’s FINFET, a diving Field Effect Transistor, shaped like a fish, swimming in a sea of silicon? <BR/><BR/>What’s IBM got, besides a great theory, SOI, Josephson Junction, etc. <BR/><BR/>Will it work or is it another pipe dream that can't be implemented to volume production?<BR/> <BR/>Further, gaps in the silicon? What’s in the gaps anyway, noxious chemicals from the last deposition? I thought you guys buffed them all out before you went on to the next layer?<BR/><BR/>SPARKSAnonymousnoreply@blogger.comtag:blogger.com,1999:blog-2602471396566186819.post-4458116129441830872007-12-10T23:16:00.000+00:002007-12-10T23:16:00.000+00:00IBM high K plans...http://www.eetimes.com/news/sem...IBM high K plans...<BR/><BR/>http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=204800387<BR/><BR/>End of 45nm? Not so much...as predicted it looks like AMD will be doing this on 32nm.<BR/><BR/>You can now see the difference between IBM's announcements and Intel's announcement - IBM announced feasibility, INtel announced implementation into production.<BR/><BR/>That said the gate first technology should be interesting... it should in theory be more scalable than Intel's technology to future nodes (the replacement gate process requires filling of extremely small spaces which will be a challenge as the features shrink).<BR/><BR/>Of course, things are moving toward FINFET / Tri-gate anyway so this will likely necessitate other changes beyond 32nm.Anonymousnoreply@blogger.com